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9163d83573
The Intel IPU6 has internal microcontrollers (scalar processor, SP) which are used to execute the firmware. The SPs can access IPU internal memory and system DRAM mapped to its an internal 32-bit virtual address space. This patch adds a driver for the IPU MMU and a DMA mapping implementation using the internal MMU. The system IOMMU may be used besides the IPU MMU. Signed-off-by: Bingbu Cao <bingbu.cao@intel.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
20 lines
373 B
C
20 lines
373 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (C) 2013--2024 Intel Corporation */
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#ifndef IPU6_DMA_H
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#define IPU6_DMA_H
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#include <linux/dma-map-ops.h>
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#include <linux/iova.h>
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struct ipu6_mmu_info;
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struct ipu6_dma_mapping {
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struct ipu6_mmu_info *mmu_info;
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struct iova_domain iovad;
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};
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extern const struct dma_map_ops ipu6_dma_ops;
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#endif /* IPU6_DMA_H */
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