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https://github.com/torvalds/linux.git
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bf373e4c78
Pull devicetree updates from Rob Herring:
"DT Bindings:
- Convert all remaining interrupt-controller bindings to DT schema
- Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
PMC, imx-drm, and ftm-quaddec to DT schema
- Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard
- Add top-level constraints for renesas,vsp1 and renesas,fcp
- Add missing constraint in amlogic,pinctrl-a4 'group' nodes
- Adjust the allowed properties for dwc3-xilinx, sony,imx219,
pci-iommu, and renesas,dsi
- Add EcoNet vendor prefix
- Fix the reserved-memory.yaml in fsl,qman-fqd
- Drop obsolete numa.txt and cpu-topology.txt which are schemas in
dtschema now
- Drop Renesas RZ/N1S bindings
- Ensure Arm cpu nodes don't allow undocumented properties. Add all
the properties which are in use and undocumented. Drop the Mediatek
cpufreq binding which is not a binding, but just what DT properties
the driver uses.
- Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU
- Update documentation on defining child nodes with separate schemas
- Add bindings to PSCI MAINTAINERS entry
DT core:
- Add new functions to simplify driver handling of 'memory-region'
properties. Users to be added next cycle.
- Simplify of_dma_set_restricted_buffer() to use
of_for_each_phandle()
- Add missing unlock on error in unittest_data_add()"
* tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (87 commits)
dt-bindings: timer: Add fsl,vf610-pit.yaml
dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC
ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card
dt-bindings: arm/cpus: Allow 2 power-domains entries
dt-bindings: usb: dwc3-xilinx: allow dma-coherent
media: dt-bindings: sony,imx219: Allow props from video-interface-devices
dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block
dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt
dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties
dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml
dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller
dt-bindings: trivial-devices: Add VZ89TE to trivial
media: dt-bindings: renesas,vsp1: add top-level constraints
media: dt-bindings: renesas,fcp: add top-level constraints
dt-bindings: trivial-devices: Add Maxim max30208
dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference
dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema
dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema
dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema
dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema
...
137 lines
3.1 KiB
YAML
137 lines
3.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/usb/dwc3-xilinx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Xilinx SuperSpeed DWC3 USB SoC controller
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maintainers:
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- Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
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properties:
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compatible:
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items:
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- enum:
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- xlnx,zynqmp-dwc3
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- xlnx,versal-dwc3
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reg:
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maxItems: 1
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"#address-cells":
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enum: [ 1, 2 ]
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"#size-cells":
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enum: [ 1, 2 ]
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ranges: true
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dma-coherent: true
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power-domains:
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description: specifies a phandle to PM domain provider node
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maxItems: 1
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clocks:
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description:
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A list of phandle and clock-specifier pairs for the clocks
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listed in clock-names.
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items:
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- description: Master/Core clock, has to be >= 125 MHz
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for SS operation and >= 60MHz for HS operation.
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- description: Clock source to core during PHY power down.
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clock-names:
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items:
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- const: bus_clk
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- const: ref_clk
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resets:
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description:
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A list of phandles for resets listed in reset-names.
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items:
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- description: USB core reset
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- description: USB hibernation reset
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- description: USB APB reset
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reset-names:
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items:
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- const: usb_crst
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- const: usb_hibrst
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- const: usb_apbrst
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phys:
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minItems: 1
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maxItems: 2
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phy-names:
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minItems: 1
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maxItems: 2
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items:
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enum:
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- usb2-phy
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- usb3-phy
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reset-gpios:
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description: GPIO used for the reset ulpi-phy
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maxItems: 1
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# Required child node:
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patternProperties:
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"^usb@[0-9a-f]+$":
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$ref: snps,dwc3.yaml#
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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- ranges
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- power-domains
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- clocks
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- clock-names
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- resets
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- reset-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
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#include <dt-bindings/power/xlnx-zynqmp-power.h>
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#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
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#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
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#include <dt-bindings/phy/phy.h>
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axi {
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#address-cells = <2>;
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#size-cells = <2>;
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usb@0 {
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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compatible = "xlnx,zynqmp-dwc3";
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reg = <0x0 0xff9d0000 0x0 0x100>;
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clocks = <&zynqmp_clk 32>, <&zynqmp_clk 34>;
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clock-names = "bus_clk", "ref_clk";
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power-domains = <&zynqmp_firmware PD_USB_0>;
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resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
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<&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,
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<&zynqmp_reset ZYNQMP_RESET_USB1_APB>;
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reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";
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phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
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phy-names = "usb3-phy";
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ranges;
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usb@fe200000 {
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compatible = "snps,dwc3";
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reg = <0x0 0xfe200000 0x0 0x40000>;
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interrupt-names = "host", "otg";
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interrupts = <0 65 4>, <0 69 4>;
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dr_mode = "host";
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dma-coherent;
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};
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};
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};
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