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f94aa7e9cf
Historically DSI PHY bindings landed to the display/msm subdir, however they describe PHYs and as such they should be in the phy/ subdir. Follow the example of other Qualcomm display-related PHYs (HDMI, eDP) and move bindings for the Qualcomm DSI PHYs to the correct subdir. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/709008/ Link: https://lore.kernel.org/r/20260305-msm-dsi-phy-v1-1-0a99ac665995@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
80 lines
1.8 KiB
YAML
80 lines
1.8 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-14nm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Display DSI 14nm PHY
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maintainers:
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- Krishna Manikandan <quic_mkrishn@quicinc.com>
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allOf:
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- $ref: qcom,dsi-phy-common.yaml#
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properties:
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compatible:
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enum:
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- qcom,dsi-phy-14nm
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- qcom,dsi-phy-14nm-2290
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- qcom,dsi-phy-14nm-660
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- qcom,dsi-phy-14nm-8953
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- qcom,sm6125-dsi-phy-14nm
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- qcom,sm6150-dsi-phy-14nm
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reg:
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items:
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- description: dsi phy register set
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- description: dsi phy lane register set
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- description: dsi pll register set
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reg-names:
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items:
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- const: dsi_phy
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- const: dsi_phy_lane
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- const: dsi_pll
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vcca-supply:
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description: Phandle to vcca regulator device node.
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power-domains:
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description:
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A phandle and PM domain specifier for an optional power domain.
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maxItems: 1
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required-opps:
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description:
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A phandle to an OPP node describing the power domain's performance point.
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maxItems: 1
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required:
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- compatible
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- reg
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- reg-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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dsi-phy@ae94400 {
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compatible = "qcom,dsi-phy-14nm";
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reg = <0x0ae94400 0x200>,
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<0x0ae94600 0x280>,
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<0x0ae94a00 0x1e0>;
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reg-names = "dsi_phy",
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"dsi_phy_lane",
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"dsi_pll";
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#clock-cells = <1>;
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#phy-cells = <0>;
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vcca-supply = <&vcca_reg>;
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clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&rpmhcc RPMH_CXO_CLK>;
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clock-names = "iface", "ref";
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};
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...
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