Dillon Varone 6b34e7ed4b drm/amd/display: Consider sink max slice width limitation for dsc ...

[WHY&HOW]
The sink max slice width limitation should be considered for DSC, but
was removed in "refactor DSC cap calculations".
This patch adds it back and takes the valid minimum between the sink and
source.

Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2025-08-27 13:57:50 -04:00

..

dcn20

drm/amd/display: Refactoring DSC enum dsc_bits_per_comp.

2025-05-05 12:54:18 -04:00

dcn35

drm/amd/display: Reset DSC memory status

2024-06-27 17:10:37 -04:00

dcn401

drm/amd/display: Refactor DSC cap calculations

2025-07-15 14:07:51 -04:00

dc_dsc.c

drm/amd/display: Consider sink max slice width limitation for dsc

2025-08-27 13:57:50 -04:00

dsc.h

drm/amd/display: Make dcn401_initialize_min_clocks() available to other compilation units

2025-07-15 14:07:51 -04:00

dscc_types.h

drm/amd/display: add rc_params_override option in dc_dsc_config

2023-01-31 14:00:51 -05:00

Makefile

drm/amd/display: Fix POWERPC_64 compilation

2024-05-20 16:20:25 -04:00

rc_calc_dpi.c

drm/amd/display: Update DSC compute parameter calculation

2024-04-09 22:05:58 -04:00

rc_calc.c

drm/amd/display: Rename DCN config to FP

2023-03-07 14:22:40 -05:00

rc_calc.h

drm/amd/display: fixed an error related to 4:2:0/4:2:2 DSC

2021-11-24 14:06:52 -05:00