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The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a Samsung IP block. Add just the basic support for now, i.e. RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1 specific features. Co-developed-by: Algea Cao <algea.cao@rock-chips.com> Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241016-b4-rk3588-bridge-upstream-v10-3-87ef92a6d14e@collabora.com Signed-off-by: Maxime Ripard <mripard@kernel.org>
106 lines
3.0 KiB
C
106 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
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* Author:Mark Yao <mark.yao@rock-chips.com>
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*
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* based on exynos_drm_drv.h
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*/
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#ifndef _ROCKCHIP_DRM_DRV_H
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#define _ROCKCHIP_DRM_DRV_H
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_gem.h>
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#include <linux/bits.h>
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#include <linux/component.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#define ROCKCHIP_MAX_FB_BUFFER 3
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#define ROCKCHIP_MAX_CONNECTOR 2
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#define ROCKCHIP_MAX_CRTC 4
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/*
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* display output interface supported by rockchip lcdc
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*/
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#define ROCKCHIP_OUT_MODE_P888 0
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#define ROCKCHIP_OUT_MODE_BT1120 0
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#define ROCKCHIP_OUT_MODE_P666 1
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#define ROCKCHIP_OUT_MODE_P565 2
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#define ROCKCHIP_OUT_MODE_BT656 5
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#define ROCKCHIP_OUT_MODE_S888 8
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#define ROCKCHIP_OUT_MODE_S888_DUMMY 12
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#define ROCKCHIP_OUT_MODE_YUV420 14
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/* for use special outface */
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#define ROCKCHIP_OUT_MODE_AAAA 15
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/* output flags */
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#define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0)
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struct drm_device;
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struct drm_connector;
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struct iommu_domain;
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struct rockchip_crtc_state {
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struct drm_crtc_state base;
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int output_type;
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int output_mode;
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int output_bpc;
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int output_flags;
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bool enable_afbc;
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bool yuv_overlay;
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u32 bus_format;
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u32 bus_flags;
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int color_space;
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};
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#define to_rockchip_crtc_state(s) \
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container_of(s, struct rockchip_crtc_state, base)
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/*
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* Rockchip drm private structure.
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*
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* @crtc: array of enabled CRTCs, used to map from "pipe" to drm_crtc.
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* @num_pipe: number of pipes for this device.
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* @mm_lock: protect drm_mm on multi-threads.
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*/
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struct rockchip_drm_private {
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struct iommu_domain *domain;
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struct device *iommu_dev;
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struct mutex mm_lock;
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struct drm_mm mm;
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};
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struct rockchip_encoder {
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int crtc_endpoint_id;
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struct drm_encoder encoder;
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};
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int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
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struct device *dev);
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void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
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struct device *dev);
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void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
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struct device *dev);
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int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
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int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rencoder,
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struct device_node *np, int port, int reg);
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int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
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extern struct platform_driver cdn_dp_driver;
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extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;
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extern struct platform_driver dw_hdmi_qp_rockchip_pltfm_driver;
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extern struct platform_driver dw_mipi_dsi_rockchip_driver;
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extern struct platform_driver inno_hdmi_driver;
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extern struct platform_driver rockchip_dp_driver;
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extern struct platform_driver rockchip_lvds_driver;
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extern struct platform_driver vop_platform_driver;
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extern struct platform_driver rk3066_hdmi_driver;
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extern struct platform_driver vop2_platform_driver;
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static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder)
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{
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return container_of(encoder, struct rockchip_encoder, encoder);
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}
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#endif /* _ROCKCHIP_DRM_DRV_H_ */
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