Nicholas Susanto d074e0f9ec drm/amd/display: Fix DML calculation errors ...

[Why]
DML calculations differ with DCN3.1 spreadsheet values due to
translations errors from the visual basic code

[How]
Add missing calculations that set the value for DSCDelay

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Nicholas Susanto <nicholas.susanto@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2023-09-11 17:15:23 -04:00

..

dcn314_fpu.c

drm/amd/display: set minimum of VBlank_nom

2023-08-30 14:59:11 -04:00

dcn314_fpu.h

drm/amd/display: Move populate dml pipes from DCN314 to dml

2022-08-10 15:11:08 -04:00

display_mode_vba_314.c

drm/amd/display: Fix DML calculation errors

2023-09-11 17:15:23 -04:00

display_mode_vba_314.h

drm/amd/display: Add DCN314 DML calculation support

2022-07-13 20:57:04 -04:00

display_rq_dlg_calc_314.c

drm/amd/display: Clean FPGA code in dc

2023-06-09 10:44:11 -04:00

display_rq_dlg_calc_314.h

drm/amd/display: Add DCN314 DML calculation support

2022-07-13 20:57:04 -04:00