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Document the RPMh Network-On-Chip Interconnect of the SM8650 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231123-topic-sm8650-upstream-interconnect-v2-1-7e050874f59b@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
137 lines
3.2 KiB
YAML
137 lines
3.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
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maintainers:
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- Abel Vesa <abel.vesa@linaro.org>
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- Neil Armstrong <neil.armstrong@linaro.org>
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description: |
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RPMh interconnect providers support system bandwidth requirements through
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RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
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able to communicate with the BCM through the Resource State Coordinator (RSC)
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associated with each execution environment. Provider nodes must point to at
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least one RPMh device child node pertaining to their RSC and each provider
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can map to multiple RPMh resources.
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See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
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properties:
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compatible:
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enum:
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- qcom,sm8650-aggre1-noc
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- qcom,sm8650-aggre2-noc
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- qcom,sm8650-clk-virt
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- qcom,sm8650-cnoc-main
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- qcom,sm8650-config-noc
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- qcom,sm8650-gem-noc
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- qcom,sm8650-lpass-ag-noc
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- qcom,sm8650-lpass-lpiaon-noc
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- qcom,sm8650-lpass-lpicx-noc
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- qcom,sm8650-mc-virt
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- qcom,sm8650-mmss-noc
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- qcom,sm8650-nsp-noc
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- qcom,sm8650-pcie-anoc
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- qcom,sm8650-system-noc
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reg:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 2
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required:
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- compatible
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allOf:
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- $ref: qcom,rpmh-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8650-clk-virt
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- qcom,sm8650-mc-virt
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then:
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properties:
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reg: false
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else:
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required:
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- reg
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8650-pcie-anoc
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then:
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properties:
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clocks:
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items:
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- description: aggre-NOC PCIe AXI clock
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- description: cfg-NOC PCIe a-NOC AHB clock
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8650-aggre1-noc
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then:
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properties:
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clocks:
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items:
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- description: aggre UFS PHY AXI clock
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- description: aggre USB3 PRIM AXI clock
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8650-aggre2-noc
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then:
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properties:
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clocks:
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items:
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- description: RPMH CC IPA clock
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8650-aggre1-noc
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- qcom,sm8650-aggre2-noc
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- qcom,sm8650-pcie-anoc
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then:
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required:
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- clocks
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else:
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properties:
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clocks: false
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unevaluatedProperties: false
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examples:
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- |
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clk_virt: interconnect-0 {
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compatible = "qcom,sm8650-clk-virt";
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#interconnect-cells = <2>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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aggre1_noc: interconnect@16e0000 {
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compatible = "qcom,sm8650-aggre1-noc";
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reg = <0x016e0000 0x14400>;
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#interconnect-cells = <2>;
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clocks = <&gcc_phy_axi_clk>, <&gcc_prim_axi_clk>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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