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088a422c3f
The Wa_14017073508 require to send Media Busy/Idle mailbox while accessing Media tile. As of now it is getting handled while __gt_unpark, __gt_park. But there are various corner cases where forcewakes are taken without __gt_unpark i.e. without sending Busy Mailbox especially during register reads. Forcewakes are taken without busy mailbox leads to GPU HANG. So bringing mailbox calls under forcewake calls are no feasible option as forcewake calls are atomic and mailbox calls are blocking. The issue already fixed in B step so disabling MC6 on A step and reverting previous commit which handles Wa_14017073508 Fixes:8f70f1ec58("drm/i915/mtl: Add Wa_14017073508 for SAMedia") Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230310061339.2495416-2-badal.nilawar@intel.com (cherry picked from commit038a24835a) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
82 lines
1.6 KiB
C
82 lines
1.6 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#include <linux/string_helpers.h>
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#include "intel_guc_rc.h"
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#include "intel_guc_print.h"
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#include "gt/intel_gt.h"
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#include "i915_drv.h"
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static bool __guc_rc_supported(struct intel_guc *guc)
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{
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/* GuC RC is unavailable for pre-Gen12 */
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return guc->submission_supported &&
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GRAPHICS_VER(guc_to_gt(guc)->i915) >= 12;
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}
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static bool __guc_rc_selected(struct intel_guc *guc)
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{
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if (!intel_guc_rc_is_supported(guc))
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return false;
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return guc->submission_selected;
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}
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void intel_guc_rc_init_early(struct intel_guc *guc)
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{
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guc->rc_supported = __guc_rc_supported(guc);
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guc->rc_selected = __guc_rc_selected(guc);
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}
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static int guc_action_control_gucrc(struct intel_guc *guc, bool enable)
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{
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u32 rc_mode = enable ? INTEL_GUCRC_FIRMWARE_CONTROL :
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INTEL_GUCRC_HOST_CONTROL;
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u32 action[] = {
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INTEL_GUC_ACTION_SETUP_PC_GUCRC,
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rc_mode
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};
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int ret;
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ret = intel_guc_send(guc, action, ARRAY_SIZE(action));
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ret = ret > 0 ? -EPROTO : ret;
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return ret;
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}
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static int __guc_rc_control(struct intel_guc *guc, bool enable)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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int ret;
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if (!intel_uc_uses_guc_rc(>->uc))
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return -EOPNOTSUPP;
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if (!intel_guc_is_ready(guc))
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return -EINVAL;
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ret = guc_action_control_gucrc(guc, enable);
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if (ret) {
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guc_probe_error(guc, "Failed to %s RC (%pe)\n",
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str_enable_disable(enable), ERR_PTR(ret));
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return ret;
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}
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guc_info(guc, "RC %s\n", str_enabled_disabled(enable));
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return 0;
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}
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int intel_guc_rc_enable(struct intel_guc *guc)
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{
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return __guc_rc_control(guc, true);
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}
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int intel_guc_rc_disable(struct intel_guc *guc)
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{
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return __guc_rc_control(guc, false);
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}
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