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Add support for DSC 1.2 by providing the necessary hooks to program the DPU DSC 1.2 encoder. Changes in v3: -- fixed kernel test rebot report that "__iomem *off" is declared but not used at dpu_hw_dsc_config_1_2() -- unrolling thresh loops Changes in v4: -- delete DPU_DSC_HW_REV_1_1 -- delete off and used real register name directly Changes in v7: -- replace offset with sblk->enc.base -- replace ss with slice Changes in v8: -- fixed checkpatch warning Changes in v9: -- replaced __dsc_calc_ob_max_addr() with __dsc_calc_output_buf_max_addr() -- replaced variable num_ss with num_softslice -- remove inline from function declaration changes in v10: -- rewording text of changes in v9 -- replace DPU_DSC_NATIVE_422_EN with DPU_DSC_NATIVE_42x_EN -- replace drm_dsc_calculate_flatness_det_thresh() with drm_dsc_flatness_det_thresh() Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/539500/ Link: https://lore.kernel.org/r/1685036458-22683-7-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
95 lines
2.5 KiB
C
95 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020-2022, Linaro Limited
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved
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*/
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#ifndef _DPU_HW_DSC_H
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#define _DPU_HW_DSC_H
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#include <drm/display/drm_dsc.h>
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#define DSC_MODE_SPLIT_PANEL BIT(0)
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#define DSC_MODE_MULTIPLEX BIT(1)
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#define DSC_MODE_VIDEO BIT(2)
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struct dpu_hw_dsc;
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/**
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* struct dpu_hw_dsc_ops - interface to the dsc hardware driver functions
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* Assumption is these functions will be called after clocks are enabled
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*/
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struct dpu_hw_dsc_ops {
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/**
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* dsc_disable - disable dsc
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* @hw_dsc: Pointer to dsc context
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*/
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void (*dsc_disable)(struct dpu_hw_dsc *hw_dsc);
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/**
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* dsc_config - configures dsc encoder
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* @hw_dsc: Pointer to dsc context
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* @dsc: panel dsc parameters
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* @mode: dsc topology mode to be set
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* @initial_lines: amount of initial lines to be used
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*/
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void (*dsc_config)(struct dpu_hw_dsc *hw_dsc,
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struct drm_dsc_config *dsc,
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u32 mode,
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u32 initial_lines);
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/**
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* dsc_config_thresh - programs panel thresholds
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* @hw_dsc: Pointer to dsc context
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* @dsc: panel dsc parameters
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*/
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void (*dsc_config_thresh)(struct dpu_hw_dsc *hw_dsc,
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struct drm_dsc_config *dsc);
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void (*dsc_bind_pingpong_blk)(struct dpu_hw_dsc *hw_dsc,
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enum dpu_pingpong pp);
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};
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struct dpu_hw_dsc {
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struct dpu_hw_blk base;
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struct dpu_hw_blk_reg_map hw;
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/* dsc */
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enum dpu_dsc idx;
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const struct dpu_dsc_cfg *caps;
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/* ops */
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struct dpu_hw_dsc_ops ops;
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};
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/**
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* dpu_hw_dsc_init() - Initializes the DSC hw driver object.
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* @cfg: DSC catalog entry for which driver object is required
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* @addr: Mapped register io address of MDP
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* Return: Error code or allocated dpu_hw_dsc context
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*/
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struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,
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void __iomem *addr);
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/**
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* dpu_hw_dsc_init_1_2() - initializes the v1.2 DSC hw driver object
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* @cfg: DSC catalog entry for which driver object is required
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* @addr: Mapped register io address of MDP
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* Returns: Error code or allocated dpu_hw_dsc context
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*/
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struct dpu_hw_dsc *dpu_hw_dsc_init_1_2(const struct dpu_dsc_cfg *cfg,
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void __iomem *addr);
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/**
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* dpu_hw_dsc_destroy - destroys dsc driver context
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* @dsc: Pointer to dsc driver context returned by dpu_hw_dsc_init
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*/
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void dpu_hw_dsc_destroy(struct dpu_hw_dsc *dsc);
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static inline struct dpu_hw_dsc *to_dpu_hw_dsc(struct dpu_hw_blk *hw)
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{
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return container_of(hw, struct dpu_hw_dsc, base);
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}
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#endif /* _DPU_HW_DSC_H */
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