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fd42327f31
Add devicetree binding for the Ethernet MAC present on the Actions Semi Owl family of SoCs. For the moment advertise only the support for the Actions Semi S500 SoC variant. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
93 lines
2.1 KiB
YAML
93 lines
2.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/actions,owl-emac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Actions Semi Owl SoCs Ethernet MAC Controller
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maintainers:
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- Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
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description: |
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This Ethernet MAC is used on the Owl family of SoCs from Actions Semi.
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It provides the RMII and SMII interfaces and is compliant with the
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IEEE 802.3 CSMA/CD standard, supporting both half-duplex and full-duplex
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operation modes at 10/100 Mb/s data transfer rates.
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allOf:
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- $ref: "ethernet-controller.yaml#"
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properties:
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compatible:
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oneOf:
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- const: actions,owl-emac
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- items:
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- enum:
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- actions,s500-emac
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- const: actions,owl-emac
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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additionalItems: false
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items:
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- const: eth
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- const: rmii
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resets:
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maxItems: 1
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actions,ethcfg:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the device containing custom config.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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- phy-mode
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- phy-handle
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/actions,s500-cmu.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/actions,s500-reset.h>
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ethernet@b0310000 {
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compatible = "actions,s500-emac", "actions,owl-emac";
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reg = <0xb0310000 0x10000>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu 59 /*CLK_ETHERNET*/>, <&cmu CLK_RMII_REF>;
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clock-names = "eth", "rmii";
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resets = <&cmu RESET_ETHERNET>;
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phy-mode = "rmii";
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phy-handle = <ð_phy>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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eth_phy: ethernet-phy@3 {
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reg = <0x3>;
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interrupt-parent = <&sirq>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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};
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