mirror of
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071e5aceeb
Pull ARM driver updates from Olof Johansson:
- Reset controllers: Adding support for Microchip Sparx5 Switch.
- Memory controllers: ARM Primecell PL35x SMC memory controller driver
cleanups and improvements.
- i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.
- Rockchip: RK3568 power domains support + DT binding updates,
cleanups.
- Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
including support for MSM8226, MDM9607, SM6125 and SC8180X.
- ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
interfaces and communication (including bus model) between partitions
both in Normal and Secure Worlds.
- Tegra Memory controller changes, including major rework to deal with
identity mappings at boot and integration with ARM SMMU pieces.
* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
firmware: turris-mox-rwtm: show message about HWRNG registration
firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
firmware: turris-mox-rwtm: report failures better
firmware: turris-mox-rwtm: fix reply status decoding function
soc: imx: gpcv2: add support for i.MX8MN power domains
dt-bindings: add defines for i.MX8MN power domains
firmware: tegra: bpmp: Fix Tegra234-only builds
iommu/arm-smmu: Use Tegra implementation on Tegra186
iommu/arm-smmu: tegra: Implement SID override programming
iommu/arm-smmu: tegra: Detect number of instances at runtime
dt-bindings: arm-smmu: Add Tegra186 compatible string
firmware: qcom_scm: Add MDM9607 compatible
soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
memory: emif: remove unused frequency and voltage notifiers
memory: fsl_ifc: fix leak of private memory on probe failure
memory: fsl_ifc: fix leak of IO mapping on probe failure
...
152 lines
3.4 KiB
YAML
152 lines
3.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip USB2.0 phy with inno IP block
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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enum:
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- rockchip,px30-usb2phy
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- rockchip,rk3228-usb2phy
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- rockchip,rk3308-usb2phy
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- rockchip,rk3328-usb2phy
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- rockchip,rk3366-usb2phy
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- rockchip,rk3399-usb2phy
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- rockchip,rv1108-usb2phy
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reg:
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maxItems: 1
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clock-output-names:
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description:
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The usb 480m output clock name.
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"#clock-cells":
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const: 0
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clocks:
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maxItems: 1
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clock-names:
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const: phyclk
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assigned-clocks:
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description:
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Phandle of the usb 480m clock.
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assigned-clock-parents:
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description:
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Parent of the usb 480m clock.
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Select between usb-phy output 480m and xin24m.
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Refer to clk/clock-bindings.txt for generic clock consumer properties.
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extcon:
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description:
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Phandle to the extcon device providing the cable state for the otg phy.
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rockchip,usbgrf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the syscon managing the 'usb general register files'.
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When set the driver will request its phandle as one companion-grf
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for some special SoCs (e.g rv1108).
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host-port:
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type: object
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additionalProperties: false
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properties:
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"#phy-cells":
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const: 0
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interrupts:
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description: host linestate interrupt
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interrupt-names:
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const: linestate
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phy-supply:
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description:
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Phandle to a regulator that provides power to VBUS.
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See ./phy-bindings.txt for details.
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required:
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- "#phy-cells"
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- interrupts
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- interrupt-names
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otg-port:
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type: object
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additionalProperties: false
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properties:
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"#phy-cells":
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const: 0
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interrupts:
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minItems: 1
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maxItems: 3
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interrupt-names:
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oneOf:
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- const: linestate
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- const: otg-mux
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- items:
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- const: otg-bvalid
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- const: otg-id
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- const: linestate
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phy-supply:
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description:
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Phandle to a regulator that provides power to VBUS.
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See ./phy-bindings.txt for details.
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required:
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- "#phy-cells"
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- interrupts
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- interrupt-names
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required:
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- compatible
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- reg
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- clock-output-names
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- "#clock-cells"
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- host-port
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- otg-port
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3399-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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u2phy0: usb2phy@e450 {
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compatible = "rockchip,rk3399-usb2phy";
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reg = <0xe450 0x10>;
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clocks = <&cru SCLK_USB2PHY0_REF>;
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clock-names = "phyclk";
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clock-output-names = "clk_usbphy0_480m";
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#clock-cells = <0>;
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u2phy0_host: host-port {
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interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "linestate";
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#phy-cells = <0>;
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};
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u2phy0_otg: otg-port {
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "otg-bvalid", "otg-id", "linestate";
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#phy-cells = <0>;
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};
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};
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