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TI keystone display subsystem present in AM65, AM62 and AM62A SoC support
two separate register spaces namely "common" and "common1" which can be
used by two separate hosts to program the display controller as described
in respective Technical Reference Manuals [1].
The common1 register space has similar set of configuration registers as
supported in common register space except the global configuration
registers which are exclusive to common region.
This adds binding for "common1" register region too as supported by the
hardware.
[1]:
AM62x TRM:
https://www.ti.com/lit/pdf/spruiv7 (Section 14.8.9.1 DSS Registers)
AM65x TRM:
https://www.ti.com/lit/pdf/spruid7 (Section 12.6.5 DSS Registers)
AM62A TRM:
https://www.ti.com/lit/pdf/spruj16 (Section 14.9.9 Display Subsystem Registers)
Fixes: 2d8730f102 ("dt-bindings: display: ti,am65x-dss: Add dt-schema yaml binding")
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240216062426.4170528-2-devarsht@ti.com
174 lines
4.9 KiB
YAML
174 lines
4.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 Texas Instruments Incorporated
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments AM65x Display Subsystem
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maintainers:
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- Jyri Sarha <jsarha@ti.com>
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- Tomi Valkeinen <tomi.valkeinen@ti.com>
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description: |
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The AM625 and AM65x TI Keystone Display SubSystem with two output
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ports and two video planes. In AM65x DSS, the first video port
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supports 1 OLDI TX and in AM625 DSS, the first video port output is
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internally routed to 2 OLDI TXes. The second video port supports DPI
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format. The first plane is full video plane with all features and the
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second is a "lite plane" without scaling support.
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properties:
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compatible:
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enum:
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- ti,am625-dss
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- ti,am62a7,dss
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- ti,am65x-dss
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reg:
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description:
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Addresses to each DSS memory region described in the SoC's TRM.
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items:
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- description: common DSS register area
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- description: VIDL1 light video plane
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- description: VID video plane
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- description: OVR1 overlay manager for vp1
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- description: OVR2 overlay manager for vp2
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- description: VP1 video port 1
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- description: VP2 video port 2
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- description: common1 DSS register area
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reg-names:
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items:
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- const: common
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- const: vidl1
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- const: vid
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- const: ovr1
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- const: ovr2
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- const: vp1
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- const: vp2
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- const: common1
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clocks:
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items:
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- description: fck DSS functional clock
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- description: vp1 Video Port 1 pixel clock
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- description: vp2 Video Port 2 pixel clock
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clock-names:
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items:
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- const: fck
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- const: vp1
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- const: vp2
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assigned-clocks:
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minItems: 1
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maxItems: 3
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assigned-clock-parents:
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minItems: 1
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maxItems: 3
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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description: phandle to the associated power domain
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dma-coherent:
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type: boolean
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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For AM65x DSS, the OLDI output port node from video port 1.
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For AM625 DSS, the internal DPI output port node from video
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port 1.
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For AM62A7 DSS, the port is tied off inside the SoC.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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The DSS DPI output port node from video port 2
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ti,am65x-oldi-io-ctrl:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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phandle to syscon device node mapping OLDI IO_CTRL registers.
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The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
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following OLDI_DAT1_IO_CTRL, OLDI_DAT2_IO_CTRL, OLDI_DAT3_IO_CTRL,
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and OLDI_CLK_IO_CTRL registers. This property is needed for OLDI
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interface to work.
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max-memory-bandwidth:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Input memory (from main memory to dispc) bandwidth limit in
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bytes per second
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: ti,am62a7-dss
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then:
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properties:
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ports:
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properties:
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port@0: false
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- clock-names
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- interrupts
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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dss: dss@4a00000 {
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compatible = "ti,am65x-dss";
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reg = <0x04a00000 0x1000>, /* common */
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<0x04a02000 0x1000>, /* vidl1 */
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<0x04a06000 0x1000>, /* vid */
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<0x04a07000 0x1000>, /* ovr1 */
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<0x04a08000 0x1000>, /* ovr2 */
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<0x04a0a000 0x1000>, /* vp1 */
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<0x04a0b000 0x1000>, /* vp2 */
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<0x04a01000 0x1000>; /* common1 */
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reg-names = "common", "vidl1", "vid",
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"ovr1", "ovr2", "vp1", "vp2", "common1";
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ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
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power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 67 1>,
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<&k3_clks 216 1>,
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<&k3_clks 67 2>;
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clock-names = "fck", "vp1", "vp2";
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interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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oldi_out0: endpoint {
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remote-endpoint = <&lcd_in0>;
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};
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};
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};
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};
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