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All QMP UFS PHYs except MSM8996 require 3 clocks: * ref - 19.2MHz reference clock from RPMh * ref_aux - Auxiliary reference clock from GCC * qref - QREF clock from GCC or TCSR (since SM8550) MSM8996 only requires 'ref' and 'qref' clocks. Hence, fix the binding to reflect the actual clock topology. This change obviously breaks the ABI, but it is inevitable since the clock topology needs to be accurately described in the binding. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-1-58a49d2f4605@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
156 lines
3.4 KiB
YAML
156 lines
3.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QMP PHY controller (UFS, SC8280XP)
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maintainers:
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- Vinod Koul <vkoul@kernel.org>
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description:
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The QMP PHY controller supports physical layer functionality for a number of
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controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
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properties:
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compatible:
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enum:
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- qcom,msm8996-qmp-ufs-phy
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- qcom,msm8998-qmp-ufs-phy
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- qcom,sa8775p-qmp-ufs-phy
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- qcom,sc7180-qmp-ufs-phy
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- qcom,sc7280-qmp-ufs-phy
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- qcom,sc8180x-qmp-ufs-phy
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- qcom,sc8280xp-qmp-ufs-phy
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- qcom,sdm845-qmp-ufs-phy
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- qcom,sm6115-qmp-ufs-phy
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- qcom,sm6125-qmp-ufs-phy
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- qcom,sm6350-qmp-ufs-phy
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- qcom,sm7150-qmp-ufs-phy
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- qcom,sm8150-qmp-ufs-phy
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- qcom,sm8250-qmp-ufs-phy
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- qcom,sm8350-qmp-ufs-phy
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- qcom,sm8450-qmp-ufs-phy
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- qcom,sm8550-qmp-ufs-phy
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- qcom,sm8650-qmp-ufs-phy
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reg:
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maxItems: 1
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clocks:
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minItems: 2
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maxItems: 3
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clock-names:
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minItems: 2
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maxItems: 3
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: ufsphy
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vdda-phy-supply: true
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vdda-pll-supply: true
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"#clock-cells":
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const: 1
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"#phy-cells":
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const: 0
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- power-domains
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- resets
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- reset-names
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- vdda-phy-supply
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- vdda-pll-supply
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- "#phy-cells"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8998-qmp-ufs-phy
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- qcom,sa8775p-qmp-ufs-phy
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- qcom,sc7280-qmp-ufs-phy
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- qcom,sc8180x-qmp-ufs-phy
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- qcom,sc8280xp-qmp-ufs-phy
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- qcom,sdm845-qmp-ufs-phy
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- qcom,sm6115-qmp-ufs-phy
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- qcom,sm6125-qmp-ufs-phy
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- qcom,sm6350-qmp-ufs-phy
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- qcom,sm7150-qmp-ufs-phy
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- qcom,sm8150-qmp-ufs-phy
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- qcom,sm8250-qmp-ufs-phy
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- qcom,sm8350-qmp-ufs-phy
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- qcom,sm8450-qmp-ufs-phy
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- qcom,sm8550-qmp-ufs-phy
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- qcom,sm8650-qmp-ufs-phy
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then:
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properties:
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clocks:
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minItems: 3
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maxItems: 3
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clock-names:
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items:
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- const: ref
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- const: ref_aux
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- const: qref
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8996-qmp-ufs-phy
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: ref
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- const: qref
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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ufs_mem_phy: phy@1d87000 {
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compatible = "qcom,sc8280xp-qmp-ufs-phy";
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reg = <0x01d87000 0x1000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
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<&gcc GCC_UFS_REF_CLKREF_CLK>;
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clock-names = "ref", "ref_aux", "qref";
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power-domains = <&gcc UFS_PHY_GDSC>;
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resets = <&ufs_mem_hc 0>;
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reset-names = "ufsphy";
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vdda-phy-supply = <&vreg_l6b>;
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vdda-pll-supply = <&vreg_l3b>;
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#phy-cells = <0>;
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};
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