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4907a3f54b
Device binds to proper PCI ID (LOONGSON, 0x7a03), already listed in DTS, so checking for some other compatible does not make sense. It cannot be bound to unsupported platform. Drop useless, incorrect (space in between) and undocumented compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
426 lines
10 KiB
Plaintext
426 lines
10 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/ {
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pch: bus@10000000 {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
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0 0x20000000 0 0x20000000 0 0x10000000
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0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
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0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
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pic: interrupt-controller@10000000 {
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compatible = "loongson,pch-pic-1.0";
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reg = <0 0x10000000 0 0x400>;
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interrupt-controller;
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interrupt-parent = <&htvec>;
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loongson,pic-base-vec = <0>;
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#interrupt-cells = <2>;
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};
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rtc0: rtc@100d0100 {
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compatible = "loongson,ls7a-rtc";
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reg = <0 0x100d0100 0 0x78>;
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interrupt-parent = <&pic>;
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interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
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};
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ls7a_uart0: serial@10080000 {
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compatible = "ns16550a";
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reg = <0 0x10080000 0 0x100>;
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clock-frequency = <50000000>;
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interrupt-parent = <&pic>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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no-loopback-test;
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};
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ls7a_uart1: serial@10080100 {
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status = "disabled";
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compatible = "ns16550a";
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reg = <0 0x10080100 0 0x100>;
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clock-frequency = <50000000>;
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interrupt-parent = <&pic>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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no-loopback-test;
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};
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ls7a_uart2: serial@10080200 {
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status = "disabled";
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compatible = "ns16550a";
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reg = <0 0x10080200 0 0x100>;
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clock-frequency = <50000000>;
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interrupt-parent = <&pic>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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no-loopback-test;
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};
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ls7a_uart3: serial@10080300 {
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status = "disabled";
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compatible = "ns16550a";
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reg = <0 0x10080300 0 0x100>;
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clock-frequency = <50000000>;
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interrupt-parent = <&pic>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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no-loopback-test;
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};
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pci@1a000000 {
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compatible = "loongson,ls7a-pci";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <2>;
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msi-parent = <&msi>;
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reg = <0 0x1a000000 0 0x02000000>,
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<0xefe 0x00000000 0 0x20000000>;
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ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
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<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
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ohci@4,0 {
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compatible = "pci0014,7a24.0",
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"pci0014,7a24",
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"pciclass0c0310",
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"pciclass0c03";
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reg = <0x2000 0x0 0x0 0x0 0x0>;
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interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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ehci@4,1 {
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compatible = "pci0014,7a14.0",
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"pci0014,7a14",
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"pciclass0c0320",
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"pciclass0c03";
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reg = <0x2100 0x0 0x0 0x0 0x0>;
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interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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ohci@5,0 {
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compatible = "pci0014,7a24.0",
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"pci0014,7a24",
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"pciclass0c0310",
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"pciclass0c03";
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reg = <0x2800 0x0 0x0 0x0 0x0>;
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interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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ehci@5,1 {
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compatible = "pci0014,7a14.0",
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"pci0014,7a14",
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"pciclass0c0320",
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"pciclass0c03";
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reg = <0x2900 0x0 0x0 0x0 0x0>;
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interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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sata@8,0 {
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compatible = "pci0014,7a08.0",
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"pci0014,7a08",
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"pciclass010601",
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"pciclass0106";
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reg = <0x4000 0x0 0x0 0x0 0x0>;
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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sata@8,1 {
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compatible = "pci0014,7a08.0",
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"pci0014,7a08",
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"pciclass010601",
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"pciclass0106";
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reg = <0x4100 0x0 0x0 0x0 0x0>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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sata@8,2 {
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compatible = "pci0014,7a08.0",
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"pci0014,7a08",
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"pciclass010601",
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"pciclass0106";
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reg = <0x4200 0x0 0x0 0x0 0x0>;
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interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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gpu@6,0 {
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compatible = "pci0014,7a15.0",
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"pci0014,7a15",
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"pciclass030200",
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"pciclass0302";
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reg = <0x3000 0x0 0x0 0x0 0x0>;
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interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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dc@6,1 {
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compatible = "pci0014,7a06.0",
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"pci0014,7a06",
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"pciclass030000",
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"pciclass0300";
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reg = <0x3100 0x0 0x0 0x0 0x0>;
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interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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hda@7,0 {
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compatible = "pci0014,7a07.0",
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"pci0014,7a07",
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"pciclass040300",
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"pciclass0403";
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reg = <0x3800 0x0 0x0 0x0 0x0>;
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interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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};
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gmac@3,0 {
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compatible = "pci0014,7a03.0",
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"pci0014,7a03",
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"pciclass020000",
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"pciclass0200";
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reg = <0x1800 0x0 0x0 0x0 0x0>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
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<13 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq", "eth_lpi";
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interrupt-parent = <&pic>;
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phy-mode = "rgmii";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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};
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gmac@3,1 {
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compatible = "pci0014,7a03.0",
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"pci0014,7a03",
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"pciclass020000",
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"pciclass0200",
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"loongson, pci-gmac";
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reg = <0x1900 0x0 0x0 0x0 0x0>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
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<15 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq", "eth_lpi";
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interrupt-parent = <&pic>;
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phy-mode = "rgmii";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy1: ethernet-phy@1 {
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reg = <0>;
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};
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};
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};
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pci_bridge@9,0 {
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compatible = "pci0014,7a19.1",
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"pci0014,7a19",
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"pciclass060400",
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"pciclass0604";
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reg = <0x4800 0x0 0x0 0x0 0x0>;
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interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@a,0 {
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compatible = "pci0014,7a09.1",
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"pci0014,7a09",
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"pciclass060400",
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"pciclass0604";
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reg = <0x5000 0x0 0x0 0x0 0x0>;
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interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@b,0 {
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compatible = "pci0014,7a09.1",
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"pci0014,7a09",
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"pciclass060400",
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"pciclass0604";
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reg = <0x5800 0x0 0x0 0x0 0x0>;
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interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@c,0 {
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compatible = "pci0014,7a09.1",
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"pci0014,7a09",
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"pciclass060400",
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"pciclass0604";
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reg = <0x6000 0x0 0x0 0x0 0x0>;
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interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@d,0 {
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compatible = "pci0014,7a19.1",
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"pci0014,7a19",
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"pciclass060400",
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"pciclass0604";
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reg = <0x6800 0x0 0x0 0x0 0x0>;
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interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@e,0 {
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compatible = "pci0014,7a09.1",
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"pci0014,7a09",
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"pciclass060400",
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"pciclass0604";
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reg = <0x7000 0x0 0x0 0x0 0x0>;
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interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@f,0 {
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compatible = "pci0014,7a29.1",
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"pci0014,7a29",
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"pciclass060400",
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"pciclass0604";
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reg = <0x7800 0x0 0x0 0x0 0x0>;
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interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@10,0 {
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compatible = "pci0014,7a19.1",
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"pci0014,7a19",
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"pciclass060400",
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"pciclass0604";
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reg = <0x8000 0x0 0x0 0x0 0x0>;
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interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@11,0 {
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compatible = "pci0014,7a29.1",
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"pci0014,7a29",
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"pciclass060400",
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"pciclass0604";
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reg = <0x8800 0x0 0x0 0x0 0x0>;
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interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@12,0 {
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compatible = "pci0014,7a19.1",
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"pci0014,7a19",
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"pciclass060400",
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"pciclass0604";
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reg = <0x9000 0x0 0x0 0x0 0x0>;
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interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@13,0 {
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compatible = "pci0014,7a29.1",
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"pci0014,7a29",
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"pciclass060400",
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"pciclass0604";
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reg = <0x9800 0x0 0x0 0x0 0x0>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci_bridge@14,0 {
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compatible = "pci0014,7a19.1",
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"pci0014,7a19",
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"pciclass060400",
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"pciclass0604";
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reg = <0xa000 0x0 0x0 0x0 0x0>;
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interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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isa@18000000 {
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compatible = "isa";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0 0x18000000 0x20000>;
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};
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};
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};
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