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GuC load will need to happen at an earlier point in probe, where local memory is not yet available. Use system memory for GuC data structures used for initial "hwconfig" load, and realloc at a later, "post-hwconfig" load if needed, when local memory is available. Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240219130530.1406044-1-michal.winiarski@intel.com
98 lines
2.3 KiB
C
98 lines
2.3 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "xe_guc_log.h"
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#include <drm/drm_managed.h>
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#include "xe_bo.h"
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#include "xe_gt.h"
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#include "xe_map.h"
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#include "xe_module.h"
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static struct xe_gt *
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log_to_gt(struct xe_guc_log *log)
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{
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return container_of(log, struct xe_gt, uc.guc.log);
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}
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static struct xe_device *
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log_to_xe(struct xe_guc_log *log)
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{
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return gt_to_xe(log_to_gt(log));
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}
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static size_t guc_log_size(void)
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{
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/*
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* GuC Log buffer Layout
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*
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* +===============================+ 00B
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* | Crash dump state header |
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* +-------------------------------+ 32B
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* | Debug state header |
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* +-------------------------------+ 64B
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* | Capture state header |
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* +-------------------------------+ 96B
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* | |
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* +===============================+ PAGE_SIZE (4KB)
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* | Crash Dump logs |
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* +===============================+ + CRASH_SIZE
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* | Debug logs |
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* +===============================+ + DEBUG_SIZE
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* | Capture logs |
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* +===============================+ + CAPTURE_SIZE
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*/
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return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +
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CAPTURE_BUFFER_SIZE;
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}
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void xe_guc_log_print(struct xe_guc_log *log, struct drm_printer *p)
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{
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struct xe_device *xe = log_to_xe(log);
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size_t size;
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int i, j;
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xe_assert(xe, log->bo);
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size = log->bo->size;
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#define DW_PER_READ 128
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xe_assert(xe, !(size % (DW_PER_READ * sizeof(u32))));
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for (i = 0; i < size / sizeof(u32); i += DW_PER_READ) {
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u32 read[DW_PER_READ];
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xe_map_memcpy_from(xe, read, &log->bo->vmap, i * sizeof(u32),
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DW_PER_READ * sizeof(u32));
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#define DW_PER_PRINT 4
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for (j = 0; j < DW_PER_READ / DW_PER_PRINT; ++j) {
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u32 *print = read + j * DW_PER_PRINT;
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drm_printf(p, "0x%08x 0x%08x 0x%08x 0x%08x\n",
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*(print + 0), *(print + 1),
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*(print + 2), *(print + 3));
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}
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}
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}
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int xe_guc_log_init(struct xe_guc_log *log)
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{
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struct xe_device *xe = log_to_xe(log);
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struct xe_tile *tile = gt_to_tile(log_to_gt(log));
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struct xe_bo *bo;
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bo = xe_managed_bo_create_pin_map(xe, tile, guc_log_size(),
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XE_BO_CREATE_SYSTEM_BIT |
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XE_BO_CREATE_GGTT_BIT);
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if (IS_ERR(bo))
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return PTR_ERR(bo);
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xe_map_memset(xe, &bo->vmap, 0, 0, guc_log_size());
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log->bo = bo;
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log->level = xe_modparam.guc_log_level;
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return 0;
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}
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