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Update IBM z13 event counter description to the latest level
as described in the documents
1. SA23-2260-07:
"The Load-Program-Parameter and the CPU-Measurement Facilities."
released on May, 2022
for the following counter sets:
* Basic counter set
* Problem counter set
* Crypto counter set
2. SA23-2261-07:
"The CPU-Measurement Facility Extended Counters Definition
for z10, z196/z114, zEC12/zBC12, z13/z13s, z14, z15 and z16"
released on April 29, 2022
for the following counter sets:
* Extended counter set
* MT-Diagnostic counter set
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Acked-by: Sumanth Korikkar <sumanthk@linux.ibm.com>
Acked-by: Ian Rogers <irogers@google.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: https://lore.kernel.org/r/20220531092706.1931503-3-tmricht@linux.ibm.com
Cc: acme@kernel.org
Cc: gor@linux.ibm.com
Cc: hca@linux.ibm.com
Cc: svens@linux.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-perf-users@vger.kernel.org
87 lines
3.4 KiB
JSON
87 lines
3.4 KiB
JSON
[
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{
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"Unit": "CPU-M-CF",
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"EventCode": "0",
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"EventName": "CPU_CYCLES",
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"BriefDescription": "Cycle Count",
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"PublicDescription": "This counter counts the total number of CPU cycles, excluding the number of cycles while the CPU is in the wait state."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "1",
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"EventName": "INSTRUCTIONS",
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"BriefDescription": "Instruction Count",
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"PublicDescription": "This counter counts the total number of instructions executed by the CPU."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "2",
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"EventName": "L1I_DIR_WRITES",
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"BriefDescription": "Level-1 I-Cache Directory Write Count",
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"PublicDescription": "This counter counts the total number of level-1 instruction-cache or unified-cache directory writes."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "3",
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"EventName": "L1I_PENALTY_CYCLES",
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"BriefDescription": "Level-1 I-Cache Penalty Cycle Count",
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"PublicDescription": "This counter counts the total number of cache penalty cycles for level-1 instruction cache or unified cache."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "4",
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"EventName": "L1D_DIR_WRITES",
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"BriefDescription": "Level-1 D-Cache Directory Write Count",
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"PublicDescription": "This counter counts the total number of level-1 data-cache directory writes."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "5",
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"EventName": "L1D_PENALTY_CYCLES",
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"BriefDescription": "Level-1 D-Cache Penalty Cycle Count",
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"PublicDescription": "This counter counts the total number of cache penalty cycles for level-1 data cache."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "32",
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"EventName": "PROBLEM_STATE_CPU_CYCLES",
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"BriefDescription": "Problem-State Cycle Count",
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"PublicDescription": "This counter counts the total number of CPU cycles when the CPU is in the problem state, excluding the number of cycles while the CPU is in the wait state."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "33",
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"EventName": "PROBLEM_STATE_INSTRUCTIONS",
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"BriefDescription": "Problem-State Instruction Count",
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"PublicDescription": "This counter counts the total number of instructions executed by the CPU while in the problem state."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "34",
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"EventName": "PROBLEM_STATE_L1I_DIR_WRITES",
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"BriefDescription": "Problem-State Level-1 I-Cache Directory Write Count",
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"PublicDescription": "This counter counts the total number of level-1 instruction-cache or unified-cache directory writes while the CPU is in the problem state."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "35",
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"EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES",
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"BriefDescription": "Level-1 I-Cache Penalty Cycle Count",
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"PublicDescription": "This counter counts the total number of penalty cycles for level-1 instruction cache or unified cache while the CPU is in the problem state."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "36",
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"EventName": "PROBLEM_STATE_L1D_DIR_WRITES",
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"BriefDescription": "Problem-State Level-1 D-Cache Directory Write Count",
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"PublicDescription": "This counter counts the total number of level-1 data-cache directory writes while the CPU is in the problem state."
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},
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{
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"Unit": "CPU-M-CF",
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"EventCode": "37",
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"EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES",
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"BriefDescription": "Problem-State Level-1 D-Cache Penalty Cycle Count",
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"PublicDescription": "This counter counts the total number of penalty cycles for level-1 data cache while the CPU is in the problem state."
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}
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]
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