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5f38923853
The current signal handling tests for SME do not account for the fact that
unlike SVE all SME vector lengths are optional so we can't guarantee that
we will encounter the minimum possible VL, they will hang enumerating VLs
on such systems. Abort enumeration when we find the lowest VL.
Fixes: 4963aeb35a ("kselftest/arm64: signal: Add SME signal handling tests")
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230131-arm64-kselftest-sig-sme-no-128-v1-1-d47c13dc8e1e@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
139 lines
2.8 KiB
C
139 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021 ARM Limited
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*
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* Verify that the ZA register context in signal frames is set up as
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* expected.
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*/
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#include <signal.h>
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#include <ucontext.h>
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#include <sys/prctl.h>
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#include "test_signals_utils.h"
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#include "testcases.h"
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static union {
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ucontext_t uc;
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char buf[1024 * 128];
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} context;
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static unsigned int vls[SVE_VQ_MAX];
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unsigned int nvls = 0;
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static bool sme_get_vls(struct tdescr *td)
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{
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int vq, vl;
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/*
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* Enumerate up to SME_VQ_MAX vector lengths
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*/
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for (vq = SVE_VQ_MAX; vq > 0; --vq) {
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vl = prctl(PR_SME_SET_VL, vq * 16);
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if (vl == -1)
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return false;
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vl &= PR_SME_VL_LEN_MASK;
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/* Did we find the lowest supported VL? */
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if (vq < sve_vq_from_vl(vl))
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break;
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/* Skip missing VLs */
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vq = sve_vq_from_vl(vl);
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vls[nvls++] = vl;
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}
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/* We need at least one VL */
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if (nvls < 1) {
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fprintf(stderr, "Only %d VL supported\n", nvls);
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return false;
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}
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return true;
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}
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static void setup_za_regs(void)
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{
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/* smstart za; real data is TODO */
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asm volatile(".inst 0xd503457f" : : : );
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}
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static char zeros[ZA_SIG_REGS_SIZE(SVE_VQ_MAX)];
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static int do_one_sme_vl(struct tdescr *td, siginfo_t *si, ucontext_t *uc,
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unsigned int vl)
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{
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size_t offset;
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struct _aarch64_ctx *head = GET_BUF_RESV_HEAD(context);
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struct za_context *za;
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fprintf(stderr, "Testing VL %d\n", vl);
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if (prctl(PR_SME_SET_VL, vl) != vl) {
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fprintf(stderr, "Failed to set VL\n");
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return 1;
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}
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/*
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* Get a signal context which should have a SVE frame and registers
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* in it.
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*/
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setup_za_regs();
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if (!get_current_context(td, &context.uc, sizeof(context)))
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return 1;
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head = get_header(head, ZA_MAGIC, GET_BUF_RESV_SIZE(context), &offset);
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if (!head) {
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fprintf(stderr, "No ZA context\n");
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return 1;
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}
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za = (struct za_context *)head;
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if (za->vl != vl) {
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fprintf(stderr, "Got VL %d, expected %d\n", za->vl, vl);
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return 1;
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}
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if (head->size != ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(vl))) {
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fprintf(stderr, "ZA context size %u, expected %lu\n",
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head->size, ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(vl)));
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return 1;
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}
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fprintf(stderr, "Got expected size %u and VL %d\n",
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head->size, za->vl);
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/* We didn't load any data into ZA so it should be all zeros */
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if (memcmp(zeros, (char *)za + ZA_SIG_REGS_OFFSET,
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ZA_SIG_REGS_SIZE(sve_vq_from_vl(za->vl))) != 0) {
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fprintf(stderr, "ZA data invalid\n");
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return 1;
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}
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return 0;
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}
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static int sme_regs(struct tdescr *td, siginfo_t *si, ucontext_t *uc)
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{
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int i;
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for (i = 0; i < nvls; i++) {
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if (do_one_sme_vl(td, si, uc, vls[i]))
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return 1;
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}
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td->pass = 1;
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return 0;
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}
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struct tdescr tde = {
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.name = "ZA register",
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.descr = "Check that we get the right ZA registers reported",
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.feats_required = FEAT_SME,
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.timeout = 3,
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.init = sme_get_vls,
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.run = sme_regs,
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};
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