Sung Lee 5479034576 drm/amd/display: Lower DPP DTO only when safe ...

[Why]
A corner case currently exists where DPP DTO is lowered before
pipes are updated to a higher viewport. This causes underflow
as the DPPCLK is too low for the current viewport.

[How]
Only lower DPP DTO when it is safe to lower, or if
the newer clocks are higher than the current ones.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2019-12-18 16:09:10 -05:00

..

dcn20_clk_mgr.c

drm/amd/display: Lower DPP DTO only when safe

2019-12-18 16:09:10 -05:00

dcn20_clk_mgr.h

drm/amd/display: Lower DPP DTO only when safe

2019-12-18 16:09:10 -05:00