Files
linux/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
Jamie Gibbons 6e12a52c14 dt-bindings: gpio: mpfs: add coreGPIO support
The GPIO controllers on PolarFire SoC were based on the "soft" IP
CoreGPIO, but the inp/outp registers are at different offsets. Add
compatible to allow for support of both sets of offsets. The soft
core will not always have interrupts wired up, so only enforce them for
the "hard" core on PolarFire SoC.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-03-29 13:21:30 +01:00

108 lines
2.0 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/microchip,mpfs-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip MPFS GPIO Controller
maintainers:
- Conor Dooley <conor.dooley@microchip.com>
properties:
compatible:
items:
- enum:
- microchip,mpfs-gpio
- microchip,coregpio-rtl-v3
reg:
maxItems: 1
interrupts:
description:
Interrupt mapping, one per GPIO. Maximum 32 GPIOs.
minItems: 1
maxItems: 32
interrupt-controller: true
clocks:
maxItems: 1
"#gpio-cells":
const: 2
"#interrupt-cells":
const: 1
ngpios:
description:
The number of GPIOs available.
minimum: 1
maximum: 32
default: 32
gpio-controller: true
patternProperties:
"^.+-hog(-[0-9]+)?$":
type: object
additionalProperties: false
properties:
gpio-hog: true
gpios: true
input: true
output-high: true
output-low: true
line-name: true
required:
- gpio-hog
- gpios
allOf:
- if:
properties:
compatible:
contains:
const: microchip,mpfs-gpio
then:
required:
- interrupts
- "#interrupt-cells"
- interrupt-controller
required:
- compatible
- reg
- "#gpio-cells"
- gpio-controller
- clocks
additionalProperties: false
examples:
- |
gpio@20122000 {
compatible = "microchip,mpfs-gpio";
reg = <0x20122000 0x1000>;
clocks = <&clkcfg 25>;
interrupt-parent = <&plic>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>;
};
...