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BWMONv4 has two sets of registers: one for handling the monitor itself and one called "global" which hosts some sort of a headswitch and an interrupt control register. We did not handle that one before, as on SoCs starting with SDM845 they have been merged into a single contiguous range. To make the qcom,msm8998-bwmon less confusing and in preparation for actual MSM8998 support, describe the global register space and introduce new "qcom,sdm845-cpu-bwmon" compatible while keeping the "qcom,sdm845-bwmon" as a fallback for SoCs with this merged register space scheme. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230304-topic-ddr_bwmon-v3-1-77a050c2fbda@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
125 lines
3.0 KiB
YAML
125 lines
3.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Interconnect Bandwidth Monitor
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maintainers:
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- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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description: |
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Bandwidth Monitor measures current throughput on buses between various NoC
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fabrics and provides information when it crosses configured thresholds.
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Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
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- Measuring the bandwidth between CPUs and Last Level Cache Controller -
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called just BWMON,
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- Measuring the bandwidth between Last Level Cache Controller and memory
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(DDR) - called LLCC BWMON.
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properties:
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compatible:
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oneOf:
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- const: qcom,msm8998-bwmon # BWMON v4
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- items:
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- enum:
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- qcom,sc7280-cpu-bwmon
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- qcom,sc8280xp-cpu-bwmon
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- qcom,sdm845-cpu-bwmon
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- qcom,sm8550-cpu-bwmon
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- const: qcom,sdm845-bwmon # BWMON v4, unified register space
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- items:
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- enum:
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- qcom,sc8280xp-llcc-bwmon
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- qcom,sm8550-llcc-bwmon
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- const: qcom,sc7280-llcc-bwmon
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- const: qcom,sc7280-llcc-bwmon # BWMON v5
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- const: qcom,sdm845-llcc-bwmon # BWMON v5
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interconnects:
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maxItems: 1
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interrupts:
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maxItems: 1
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operating-points-v2: true
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opp-table:
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type: object
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reg:
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# BWMON v5 uses one register address space, v1-v4 use one or two.
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minItems: 1
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maxItems: 2
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reg-names:
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minItems: 1
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maxItems: 2
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required:
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- compatible
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- interconnects
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- interrupts
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- operating-points-v2
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- opp-table
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- reg
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additionalProperties: false
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allOf:
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- if:
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properties:
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compatible:
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const: qcom,msm8998-bwmon
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then:
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properties:
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reg:
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minItems: 2
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reg-names:
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items:
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- const: monitor
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- const: global
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else:
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properties:
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reg:
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maxItems: 1
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reg-names:
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maxItems: 1
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examples:
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- |
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#include <dt-bindings/interconnect/qcom,sdm845.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pmu@1436400 {
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compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";
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reg = <0x01436400 0x600>;
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interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
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interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
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operating-points-v2 = <&cpu_bwmon_opp_table>;
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cpu_bwmon_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-0 {
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opp-peak-kBps = <4800000>;
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};
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opp-1 {
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opp-peak-kBps = <9216000>;
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};
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opp-2 {
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opp-peak-kBps = <15052800>;
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};
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opp-3 {
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opp-peak-kBps = <20889600>;
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};
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opp-4 {
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opp-peak-kBps = <25497600>;
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};
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};
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};
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