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50da449676
sc8180x ufs phy requires to describe five reg areas for the phy to work, so move the description to the correct place documenting tx, rx lane 1, 2 and pcs. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20230325122444.249507-8-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
229 lines
4.8 KiB
YAML
229 lines
4.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-ufs-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QMP PHY controller (UFS, MSM8996)
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maintainers:
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- Vinod Koul <vkoul@kernel.org>
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description:
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QMP PHY controller supports physical layer functionality for a number of
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controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
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Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
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qcom,sc8280xp-qmp-ufs-phy.yaml.
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properties:
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compatible:
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enum:
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- qcom,msm8996-qmp-ufs-phy
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- qcom,msm8998-qmp-ufs-phy
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- qcom,sc8180x-qmp-ufs-phy
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- qcom,sdm845-qmp-ufs-phy
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- qcom,sm6115-qmp-ufs-phy
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- qcom,sm6350-qmp-ufs-phy
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- qcom,sm8150-qmp-ufs-phy
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- qcom,sm8250-qmp-ufs-phy
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- qcom,sm8350-qmp-ufs-phy
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- qcom,sm8450-qmp-ufs-phy
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reg:
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items:
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- description: serdes
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"#address-cells":
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enum: [ 1, 2 ]
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"#size-cells":
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enum: [ 1, 2 ]
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ranges: true
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clocks:
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minItems: 1
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maxItems: 3
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clock-names:
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minItems: 1
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maxItems: 3
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: ufsphy
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vdda-phy-supply: true
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vdda-pll-supply: true
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vddp-ref-clk-supply: true
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patternProperties:
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"^phy@[0-9a-f]+$":
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type: object
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description: single PHY-provider child node
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properties:
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reg:
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minItems: 3
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maxItems: 6
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"#clock-cells":
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const: 1
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"#phy-cells":
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const: 0
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required:
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- reg
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- "#phy-cells"
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additionalProperties: false
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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- ranges
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- clocks
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- clock-names
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- resets
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- reset-names
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- vdda-phy-supply
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- vdda-pll-supply
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additionalProperties: false
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8996-qmp-ufs-phy
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then:
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properties:
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: ref
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8998-qmp-ufs-phy
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- qcom,sc8180x-qmp-ufs-phy
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- qcom,sdm845-qmp-ufs-phy
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- qcom,sm6115-qmp-ufs-phy
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- qcom,sm6350-qmp-ufs-phy
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- qcom,sm8150-qmp-ufs-phy
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- qcom,sm8250-qmp-ufs-phy
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then:
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properties:
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: ref
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- const: ref_aux
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8450-qmp-ufs-phy
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: ref
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- const: ref_aux
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- const: qref
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8998-qmp-ufs-phy
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- qcom,sc8180x-qmp-ufs-phy
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- qcom,sdm845-qmp-ufs-phy
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- qcom,sm6350-qmp-ufs-phy
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- qcom,sm8150-qmp-ufs-phy
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- qcom,sm8250-qmp-ufs-phy
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- qcom,sm8350-qmp-ufs-phy
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- qcom,sm8450-qmp-ufs-phy
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then:
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patternProperties:
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"^phy@[0-9a-f]+$":
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properties:
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reg:
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items:
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- description: TX lane 1
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- description: RX lane 1
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- description: PCS
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- description: TX lane 2
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- description: RX lane 2
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8996-qmp-ufs-phy
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- qcom,sm6115-qmp-ufs-phy
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then:
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patternProperties:
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"^phy@[0-9a-f]+$":
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properties:
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reg:
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items:
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- description: TX
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- description: RX
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- description: PCS
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sm8250.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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phy-wrapper@1d87000 {
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compatible = "qcom,sm8250-qmp-ufs-phy";
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reg = <0x01d87000 0x1c0>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x01d87000 0x1000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
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clock-names = "ref", "ref_aux";
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resets = <&ufs_mem_hc 0>;
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reset-names = "ufsphy";
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vdda-phy-supply = <&vreg_l6b>;
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vdda-pll-supply = <&vreg_l3b>;
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phy@400 {
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reg = <0x400 0x108>,
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<0x600 0x1e0>,
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<0xc00 0x1dc>,
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<0x800 0x108>,
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<0xa00 0x1e0>;
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#phy-cells = <0>;
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};
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};
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