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7ae77150d9
Pull powerpc updates from Michael Ellerman: - Support for userspace to send requests directly to the on-chip GZIP accelerator on Power9. - Rework of our lockless page table walking (__find_linux_pte()) to make it safe against parallel page table manipulations without relying on an IPI for serialisation. - A series of fixes & enhancements to make our machine check handling more robust. - Lots of plumbing to add support for "prefixed" (64-bit) instructions on Power10. - Support for using huge pages for the linear mapping on 8xx (32-bit). - Remove obsolete Xilinx PPC405/PPC440 support, and an associated sound driver. - Removal of some obsolete 40x platforms and associated cruft. - Initial support for booting on Power10. - Lots of other small features, cleanups & fixes. Thanks to: Alexey Kardashevskiy, Alistair Popple, Andrew Donnellan, Andrey Abramov, Aneesh Kumar K.V, Balamuruhan S, Bharata B Rao, Bulent Abali, Cédric Le Goater, Chen Zhou, Christian Zigotzky, Christophe JAILLET, Christophe Leroy, Dmitry Torokhov, Emmanuel Nicolet, Erhard F., Gautham R. Shenoy, Geoff Levand, George Spelvin, Greg Kurz, Gustavo A. R. Silva, Gustavo Walbon, Haren Myneni, Hari Bathini, Joel Stanley, Jordan Niethe, Kajol Jain, Kees Cook, Leonardo Bras, Madhavan Srinivasan., Mahesh Salgaonkar, Markus Elfring, Michael Neuling, Michal Simek, Nathan Chancellor, Nathan Lynch, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Paul Mackerras, Pingfan Liu, Qian Cai, Ram Pai, Raphael Moreira Zinsly, Ravi Bangoria, Sam Bobroff, Sandipan Das, Segher Boessenkool, Stephen Rothwell, Sukadev Bhattiprolu, Tyrel Datwyler, Wolfram Sang, Xiongfeng Wang. * tag 'powerpc-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (299 commits) powerpc/pseries: Make vio and ibmebus initcalls pseries specific cxl: Remove dead Kconfig options powerpc: Add POWER10 architected mode powerpc/dt_cpu_ftrs: Add MMA feature powerpc/dt_cpu_ftrs: Enable Prefixed Instructions powerpc/dt_cpu_ftrs: Advertise support for ISA v3.1 if selected powerpc: Add support for ISA v3.1 powerpc: Add new HWCAP bits powerpc/64s: Don't set FSCR bits in INIT_THREAD powerpc/64s: Save FSCR to init_task.thread.fscr after feature init powerpc/64s: Don't let DT CPU features set FSCR_DSCR powerpc/64s: Don't init FSCR_DSCR in __init_FSCR() powerpc/32s: Fix another build failure with CONFIG_PPC_KUAP_DEBUG powerpc/module_64: Use special stub for _mcount() with -mprofile-kernel powerpc/module_64: Simplify check for -mprofile-kernel ftrace relocations powerpc/module_64: Consolidate ftrace code powerpc/32: Disable KASAN with pages bigger than 16k powerpc/uaccess: Don't set KUEP by default on book3s/32 powerpc/uaccess: Don't set KUAP by default on book3s/32 powerpc/8xx: Reduce time spent in allow_user_access() and friends ...
184 lines
4.0 KiB
C
184 lines
4.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_PGTABLE_H
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#define _ASM_POWERPC_PGTABLE_H
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#ifndef __ASSEMBLY__
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#include <linux/mmdebug.h>
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#include <linux/mmzone.h>
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#include <asm/processor.h> /* For TASK_SIZE */
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#include <asm/mmu.h>
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#include <asm/page.h>
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#include <asm/tlbflush.h>
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struct mm_struct;
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#endif /* !__ASSEMBLY__ */
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#ifdef CONFIG_PPC_BOOK3S
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#include <asm/book3s/pgtable.h>
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#else
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#include <asm/nohash/pgtable.h>
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#endif /* !CONFIG_PPC_BOOK3S */
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/* Note due to the way vm flags are laid out, the bits are XWR */
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_READONLY_X
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#define __P101 PAGE_READONLY_X
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#define __P110 PAGE_COPY_X
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#define __P111 PAGE_COPY_X
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_READONLY_X
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#define __S101 PAGE_READONLY_X
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#define __S110 PAGE_SHARED_X
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#define __S111 PAGE_SHARED_X
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_PPC32
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static inline pmd_t *pmd_ptr(struct mm_struct *mm, unsigned long va)
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{
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return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
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}
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static inline pmd_t *pmd_ptr_k(unsigned long va)
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{
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return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
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}
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static inline pte_t *virt_to_kpte(unsigned long vaddr)
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{
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pmd_t *pmd = pmd_ptr_k(vaddr);
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return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
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}
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#endif
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#include <asm/tlbflush.h>
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/* Keep these as a macros to avoid include dependency mess */
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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/*
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* Select all bits except the pfn
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*/
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static inline pgprot_t pte_pgprot(pte_t pte)
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{
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unsigned long pte_flags;
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pte_flags = pte_val(pte) & ~PTE_RPN_MASK;
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return __pgprot(pte_flags);
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}
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/*
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* ZERO_PAGE is a global shared page that is always zero: used
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* for zero-mapped memory areas etc..
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*/
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extern unsigned long empty_zero_page[];
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#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
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extern pgd_t swapper_pg_dir[];
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extern void paging_init(void);
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extern unsigned long ioremap_bot;
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/*
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* kern_addr_valid is intended to indicate whether an address is a valid
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* kernel address. Most 32-bit archs define it as always true (like this)
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* but most 64-bit archs actually perform a test. What should we do here?
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*/
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#define kern_addr_valid(addr) (1)
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#include <asm-generic/pgtable.h>
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#ifndef CONFIG_TRANSPARENT_HUGEPAGE
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#define pmd_large(pmd) 0
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#endif
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/* can we use this in kvm */
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unsigned long vmalloc_to_phys(void *vmalloc_addr);
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void pgtable_cache_add(unsigned int shift);
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pte_t *early_pte_alloc_kernel(pmd_t *pmdp, unsigned long va);
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#if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32)
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void mark_initmem_nx(void);
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#else
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static inline void mark_initmem_nx(void) { }
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#endif
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/*
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* When used, PTE_FRAG_NR is defined in subarch pgtable.h
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* so we are sure it is included when arriving here.
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*/
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#ifdef PTE_FRAG_NR
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static inline void *pte_frag_get(mm_context_t *ctx)
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{
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return ctx->pte_frag;
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}
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static inline void pte_frag_set(mm_context_t *ctx, void *p)
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{
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ctx->pte_frag = p;
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}
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#else
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#define PTE_FRAG_NR 1
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#define PTE_FRAG_SIZE_SHIFT PAGE_SHIFT
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#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
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static inline void *pte_frag_get(mm_context_t *ctx)
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{
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return NULL;
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}
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static inline void pte_frag_set(mm_context_t *ctx, void *p)
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{
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}
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#endif
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#ifndef pmd_is_leaf
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#define pmd_is_leaf pmd_is_leaf
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static inline bool pmd_is_leaf(pmd_t pmd)
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{
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return false;
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}
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#endif
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#ifndef pud_is_leaf
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#define pud_is_leaf pud_is_leaf
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static inline bool pud_is_leaf(pud_t pud)
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{
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return false;
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}
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#endif
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#ifndef p4d_is_leaf
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#define p4d_is_leaf p4d_is_leaf
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static inline bool p4d_is_leaf(p4d_t p4d)
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{
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return false;
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}
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#endif
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#ifdef CONFIG_PPC64
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#define is_ioremap_addr is_ioremap_addr
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static inline bool is_ioremap_addr(const void *x)
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{
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unsigned long addr = (unsigned long)x;
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return addr >= IOREMAP_BASE && addr < IOREMAP_END;
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}
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#endif /* CONFIG_PPC64 */
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_POWERPC_PGTABLE_H */
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