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The change adds support of internal HDMI I2C master controller, this subdevice is used by default, if "ddc-i2c-bus" DT property is omitted. The main purpose of this functionality is to support reading EDID from an HDMI monitor on boards, which don't have an I2C bus connected to DDC pins. The current implementation does not support "I2C Master Interface Extended Read Mode" to read data addressed by non-zero segment pointer, this means that if EDID has more than 1 extension blocks, EDID reading operation won't succeed, in my practice all tested HDMI monitors have at maximum one extension block. Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
53 lines
1.6 KiB
Plaintext
53 lines
1.6 KiB
Plaintext
DesignWare HDMI bridge bindings
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Required properties:
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- compatible: platform specific such as:
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* "snps,dw-hdmi-tx"
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* "fsl,imx6q-hdmi"
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* "fsl,imx6dl-hdmi"
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* "rockchip,rk3288-dw-hdmi"
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- reg: Physical base address and length of the controller's registers.
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- interrupts: The HDMI interrupt number
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- clocks, clock-names : must have the phandles to the HDMI iahb and isfr clocks,
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as described in Documentation/devicetree/bindings/clock/clock-bindings.txt,
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the clocks are soc specific, the clock-names should be "iahb", "isfr"
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-port@[X]: SoC specific port nodes with endpoint definitions as defined
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in Documentation/devicetree/bindings/media/video-interfaces.txt,
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please refer to the SoC specific binding document:
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* Documentation/devicetree/bindings/display/imx/hdmi.txt
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* Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
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Optional properties
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- reg-io-width: the width of the reg:1,4, default set to 1 if not present
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- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing,
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if the property is omitted, a functionally reduced I2C bus
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controller on DW HDMI is probed
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- clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"
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Example:
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hdmi: hdmi@0120000 {
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compatible = "fsl,imx6q-hdmi";
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reg = <0x00120000 0x9000>;
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interrupts = <0 115 0x04>;
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gpr = <&gpr>;
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clocks = <&clks 123>, <&clks 124>;
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clock-names = "iahb", "isfr";
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ddc-i2c-bus = <&i2c2>;
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port@0 {
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reg = <0>;
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hdmi_mux_0: endpoint {
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remote-endpoint = <&ipu1_di0_hdmi>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi_mux_1: endpoint {
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remote-endpoint = <&ipu1_di1_hdmi>;
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};
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};
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};
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