Files
linux/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt
Yuriy Kolerov 92fdb527ee ARCv2: MCIP: Deprecate setting of affinity in Device Tree
Ignore value of interrupt distribution mode for common interrupts in
IDU since setting of affinity using value from Device Tree is deprecated
in ARC. Originally it is done in idu_irq_xlate() function and it is
semantically wrong and does not guaranty that an affinity value will be
set properly. idu_irq_enable() function is better place for
initialization of common interrupts.

By default send all common interrupts to all available online CPUs.
The affinity of common interrupts in IDU must be set manually since
in some cases the kernel will not call irq_set_affinity() by itself:

  1. When the kernel is not configured with support of SMP.
  2. When the kernel is configured with support of SMP but upper
     interrupt controllers does not support setting of the affinity
     and cannot propagate it to IDU.

Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-01-24 10:22:48 -08:00

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* ARC-HS Interrupt Distribution Unit
This optional 2nd level interrupt controller can be used in SMP configurations for
dynamic IRQ routing, load balancing of common/external IRQs towards core intc.
Properties:
- compatible: "snps,archs-idu-intc"
- interrupt-controller: This is an interrupt controller.
- interrupt-parent: <reference to parent core intc>
- #interrupt-cells: Must be <2>.
- interrupts: <...> specifies the upstream core irqs
First cell specifies the "common" IRQ from peripheral to IDU
Second cell specifies the irq distribution mode to cores
0=Round Robin; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
The second cell in interrupts property is deprecated and may be ignored by
the kernel.
intc accessed via the special ARC AUX register interface, hence "reg" property
is not specified.
Example:
core_intc: core-interrupt-controller {
compatible = "snps,archs-intc";
interrupt-controller;
#interrupt-cells = <1>;
};
idu_intc: idu-interrupt-controller {
compatible = "snps,archs-idu-intc";
interrupt-controller;
interrupt-parent = <&core_intc>;
/*
* <hwirq distribution>
* distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
*/
#interrupt-cells = <2>;
/* upstream core irqs: downstream these are "COMMON" irq 0,1.. */
interrupts = <24 25 26 27 28 29 30 31>;
};
some_device: serial@c0fc1000 {
interrupt-parent = <&idu_intc>;
interrupts = <0 0>; /* upstream idu IRQ #24, Round Robin */
};