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9bfaf9c729
*-supply properties are always a single phandle, so binding schemas don't need a type $ref nor 'maxItems'. A meta-schema check for this is pending once these existing cases are fixed. Cc: Jonathan Cameron <jic23@kernel.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Maxime Ripard <mripard@kernel.org> Cc: dri-devel@lists.freedesktop.org Cc: linux-iio@vger.kernel.org Cc: linux-input@vger.kernel.org Cc: linux-media@vger.kernel.org Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20201221234659.824881-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
121 lines
3.0 KiB
YAML
121 lines
3.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/bridge/thine,thc63lvd1024.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Thine Electronics THC63LVD1024 LVDS Decoder
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maintainers:
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- Jacopo Mondi <jacopo+renesas@jmondi.org>
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- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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description: |
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The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
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streams to parallel data outputs. The chip supports single/dual input/output
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modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
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outputs.
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Single or dual operation mode, output data mapping and DDR output modes are
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configured through input signals and the chip does not expose any control
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bus.
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properties:
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compatible:
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const: thine,thc63lvd1024
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ports:
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type: object
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description: |
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This device has four video ports. Their connections are modeled using the
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OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
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The device can operate in single-link mode or dual-link mode. In
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single-link mode, all pixels are received on port@0, and port@1 shall not
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contain any endpoint. In dual-link mode, even-numbered pixels are
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received on port@0 and odd-numbered pixels on port@1, and both port@0 and
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port@1 shall contain endpoints.
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properties:
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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port@0:
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type: object
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description: First LVDS input port
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port@1:
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type: object
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description: Second LVDS input port
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port@2:
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type: object
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description: First digital CMOS/TTL parallel output
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port@3:
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type: object
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description: Second digital CMOS/TTL parallel output
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required:
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- port@0
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- port@2
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additionalProperties: false
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oe-gpios:
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maxItems: 1
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description: Output enable GPIO signal, pin name "OE", active high.
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powerdown-gpios:
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maxItems: 1
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description: Power down GPIO signal, pin name "/PDWN", active low.
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vcc-supply:
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description:
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Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and
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digital circuitry.
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required:
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- compatible
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- ports
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- vcc-supply
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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lvds-decoder {
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compatible = "thine,thc63lvd1024";
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vcc-supply = <®_lvds_vcc>;
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powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds_dec_in_0: endpoint {
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remote-endpoint = <&lvds_out>;
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};
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};
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port@2 {
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reg = <2>;
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lvds_dec_out_2: endpoint {
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remote-endpoint = <&adv7511_in>;
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};
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};
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};
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};
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...
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