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6fdc6e23a7
This doesn't yet do anything in the tools, but make it explicit so we can check either 'unevaluatedProperties' or 'additionalProperties' is present in schemas. 'unevaluatedProperties' is appropriate when including another schema (via '$ref') and all possible properties and/or child nodes are not explicitly listed in the schema with the '$ref'. This is in preparation to add a meta-schema to check for missing 'unevaluatedProperties' or 'additionalProperties'. This has been a constant source of review issues. Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Wolfram Sang <wsa@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/20201005183830.486085-2-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
109 lines
2.6 KiB
YAML
109 lines
2.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0+
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/qca,ar803x.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Atheros AR803x PHY
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maintainers:
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- Andrew Lunn <andrew@lunn.ch>
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- Florian Fainelli <f.fainelli@gmail.com>
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- Heiner Kallweit <hkallweit1@gmail.com>
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description: |
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Bindings for Qualcomm Atheros AR803x PHYs
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allOf:
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- $ref: ethernet-phy.yaml#
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properties:
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qca,clk-out-frequency:
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description: Clock output frequency in Hertz.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [25000000, 50000000, 62500000, 125000000]
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qca,clk-out-strength:
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description: Clock output driver strength.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 2]
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qca,keep-pll-enabled:
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description: |
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If set, keep the PLL enabled even if there is no link. Useful if you
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want to use the clock output without an ethernet link.
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Only supported on the AR8031.
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type: boolean
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vddio-supply:
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description: |
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RGMII I/O voltage regulator (see regulator/regulator.yaml).
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The PHY supports RGMII I/O voltages of 1.5V, 1.8V and 2.5V. You can
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either connect this to the vddio-regulator (1.5V / 1.8V) or the
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vddh-regulator (2.5V).
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Only supported on the AR8031.
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vddio-regulator:
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type: object
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description:
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Initial data for the VDDIO regulator. Set this to 1.5V or 1.8V.
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$ref: /schemas/regulator/regulator.yaml
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vddh-regulator:
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type: object
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description:
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Dummy subnode to model the external connection of the PHY VDDH
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regulator to VDDIO.
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$ref: /schemas/regulator/regulator.yaml
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/net/qca-ar803x.h>
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ethernet {
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#address-cells = <1>;
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#size-cells = <0>;
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phy-mode = "rgmii-id";
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ethernet-phy@0 {
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reg = <0>;
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qca,clk-out-frequency = <125000000>;
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qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
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vddio-supply = <&vddio>;
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vddio: vddio-regulator {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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};
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- |
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#include <dt-bindings/net/qca-ar803x.h>
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ethernet {
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#address-cells = <1>;
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#size-cells = <0>;
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phy-mode = "rgmii-id";
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ethernet-phy@0 {
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reg = <0>;
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qca,clk-out-frequency = <50000000>;
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qca,keep-pll-enabled;
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vddio-supply = <&vddh>;
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vddh: vddh-regulator {
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};
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};
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};
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