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5be478f9c2
Another round of wack-a-mole. The json-schema default is additional unknown properties are allowed, but for DT all properties should be defined. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Baolin Wang <baolin.wang7@gmail.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # for iio Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Mark Brown <broonie@kernel.org> Reviewd-by: Corey Minyard <cminyard@mvista.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Sebastian Reichel <sre@kernel.org> Link: https://lore.kernel.org/r/20201002234143.3570746-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
111 lines
2.8 KiB
YAML
111 lines
2.8 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Bindings for the TI wrapper module for the Cadence USBSS-DRD controller
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maintainers:
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- Roger Quadros <rogerq@ti.com>
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properties:
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compatible:
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items:
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- const: ti,j721e-usb
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reg:
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description: module registers
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power-domains:
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description:
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PM domain provider node and an args specifier containing
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the USB device id value. See,
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Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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clocks:
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description: Clock phandles to usb2_refclk and lpm_clk
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: ref
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- const: lpm
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ti,usb2-only:
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description:
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If present, it restricts the controller to USB2.0 mode of
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operation. Must be present if USB3 PHY is not available
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for USB.
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type: boolean
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ti,vbus-divider:
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description:
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Should be present if USB VBUS line is connected to the
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VBUS pin of the SoC via a 1/3 voltage divider.
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type: boolean
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assigned-clocks:
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maxItems: 1
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assigned-clock-parents:
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maxItems: 1
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'#address-cells':
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const: 2
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'#size-cells':
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const: 2
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patternProperties:
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"^usb@":
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type: object
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required:
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- compatible
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- reg
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- power-domains
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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cdns_usb@4104000 {
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compatible = "ti,j721e-usb";
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reg = <0x00 0x4104000 0x00 0x100>;
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power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 288 15>, <&k3_clks 288 3>;
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clock-names = "ref", "lpm";
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assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */
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assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */
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#address-cells = <2>;
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#size-cells = <2>;
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usb@6000000 {
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compatible = "cdns,usb3";
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reg = <0x00 0x6000000 0x00 0x10000>,
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<0x00 0x6010000 0x00 0x10000>,
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<0x00 0x6020000 0x00 0x10000>;
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reg-names = "otg", "xhci", "dev";
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
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<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
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interrupt-names = "host",
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"peripheral",
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"otg";
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maximum-speed = "super-speed";
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dr_mode = "otg";
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};
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};
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};
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