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Introduce a driver that supports three PHYs found on the SpacemiT K1 SoC. The first PHY is a combo PHY that can be configured for use for either USB 3 or PCIe. The other two PHYs support PCIe only. All three PHYs must be programmed with an 8 bit receiver termination value, which must be determined dynamically. Only the combo PHY is able to determine this value. The combo PHY performs a special calibration step at probe time to discover this, and that value is used to program each PHY that operates in PCIe mode. The combo PHY must therefore be probed before either of the PCIe-only PHYs will be used. Each PHY has an internal PLL driven from an external oscillator. This PLL started when the PHY is first initialized, and stays on thereafter. During normal operation, the USB or PCIe driver using the PHY must ensure (other) clocks and resets are set up properly. However PCIe mode clocks are enabled and resets are de-asserted temporarily by this driver to perform the calibration step on the combo PHY. Tested-by: Junzhong Pan <panjunzhong@linux.spacemit.com> Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/all/ba532f8d-a452-40e5-af46-b58b89f70a92@linaro.org/ [1] Tested-by: Yixun Lan <dlan@gentoo.org> Link: https://patch.msgid.link/20251218151235.454997-4-elder@riscstar.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
146 lines
4.3 KiB
Plaintext
146 lines
4.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# PHY
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#
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menu "PHY Subsystem"
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config GENERIC_PHY
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bool "PHY Core"
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help
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Generic PHY support.
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This framework is designed to provide a generic interface for PHY
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devices present in the kernel. This layer will have the generic
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API by which phy drivers can create PHY using the phy framework and
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phy users can obtain reference to the PHY. All the users of this
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framework should select this config.
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config GENERIC_PHY_MIPI_DPHY
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bool
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select GENERIC_PHY
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help
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Generic MIPI D-PHY support.
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Provides a number of helpers a core functions for MIPI D-PHY
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drivers to us.
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config PHY_LPC18XX_USB_OTG
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tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
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depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
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depends on MFD_SYSCON
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select GENERIC_PHY
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help
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Enable this to support NXP LPC18xx/43xx internal USB OTG PHY.
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This driver is need for USB0 support on LPC18xx/43xx and takes
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care of enabling and clock setup.
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config PHY_PISTACHIO_USB
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tristate "IMG Pistachio USB2.0 PHY driver"
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depends on MIPS || COMPILE_TEST
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select GENERIC_PHY
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help
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Enable this to support the USB2.0 PHY on the IMG Pistachio SoC.
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config PHY_SNPS_EUSB2
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tristate "SNPS eUSB2 PHY Driver"
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depends on OF && (ARCH_EXYNOS || ARCH_QCOM || COMPILE_TEST)
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select GENERIC_PHY
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help
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Enable support for the USB high-speed SNPS eUSB2 phy on select
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SoCs. The PHY is usually paired with a Synopsys DWC3 USB controller.
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config PHY_XGENE
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tristate "APM X-Gene 15Gbps PHY support"
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depends on HAS_IOMEM && OF && (ARCH_XGENE || COMPILE_TEST)
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select GENERIC_PHY
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help
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This option enables support for APM X-Gene SoC multi-purpose PHY.
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config USB_LGM_PHY
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tristate "INTEL Lightning Mountain USB PHY Driver"
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depends on USB_SUPPORT
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depends on X86 || COMPILE_TEST
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select USB_PHY
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select REGULATOR
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select REGULATOR_FIXED_VOLTAGE
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help
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Enable this to support Intel DWC3 PHY USB phy. This driver provides
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interface to interact with USB GEN-II and USB 3.x PHY that is part
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of the Intel network SOC.
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config PHY_CAN_TRANSCEIVER
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tristate "CAN transceiver PHY"
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select GENERIC_PHY
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select MULTIPLEXER
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help
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This option enables support for CAN transceivers as a PHY. This
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driver provides function for putting the transceivers in various
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functional modes using gpios and sets the attribute max link
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rate, for CAN drivers.
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config PHY_AIROHA_PCIE
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tristate "Airoha PCIe-PHY Driver"
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depends on ARCH_AIROHA || COMPILE_TEST
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depends on OF
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select GENERIC_PHY
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help
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Say Y here to add support for Airoha PCIe PHY driver.
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This driver create the basic PHY instance and provides initialize
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callback for PCIe GEN3 port.
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config PHY_NXP_PTN3222
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tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver"
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depends on I2C
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depends on OF
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select GENERIC_PHY
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help
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Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver.
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This redriver performs translation between eUSB2 and USB2 signalling
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schemes. It supports all three USB 2.0 data rates: Low Speed, Full
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Speed and High Speed.
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config PHY_SPACEMIT_K1_PCIE
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tristate "PCIe and combo PHY driver for the SpacemiT K1 SoC"
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depends on ARCH_SPACEMIT || COMPILE_TEST
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depends on HAS_IOMEM
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depends on OF
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select GENERIC_PHY
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default ARCH_SPACEMIT
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help
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Enable support for the PCIe and USB 3 combo PHY and two
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PCIe-only PHYs used in the SpacemiT K1 SoC.
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source "drivers/phy/allwinner/Kconfig"
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source "drivers/phy/amlogic/Kconfig"
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source "drivers/phy/broadcom/Kconfig"
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source "drivers/phy/cadence/Kconfig"
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source "drivers/phy/freescale/Kconfig"
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source "drivers/phy/hisilicon/Kconfig"
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source "drivers/phy/ingenic/Kconfig"
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source "drivers/phy/lantiq/Kconfig"
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source "drivers/phy/marvell/Kconfig"
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source "drivers/phy/mediatek/Kconfig"
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source "drivers/phy/microchip/Kconfig"
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source "drivers/phy/motorola/Kconfig"
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source "drivers/phy/mscc/Kconfig"
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source "drivers/phy/nuvoton/Kconfig"
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source "drivers/phy/qualcomm/Kconfig"
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source "drivers/phy/ralink/Kconfig"
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source "drivers/phy/realtek/Kconfig"
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source "drivers/phy/renesas/Kconfig"
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source "drivers/phy/rockchip/Kconfig"
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source "drivers/phy/samsung/Kconfig"
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source "drivers/phy/socionext/Kconfig"
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source "drivers/phy/sophgo/Kconfig"
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source "drivers/phy/st/Kconfig"
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source "drivers/phy/starfive/Kconfig"
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source "drivers/phy/sunplus/Kconfig"
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source "drivers/phy/tegra/Kconfig"
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source "drivers/phy/ti/Kconfig"
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source "drivers/phy/intel/Kconfig"
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source "drivers/phy/xilinx/Kconfig"
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endmenu
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