Files
linux/drivers/clk
Alexander Shiyan 831a8ac722 clk: rockchip: rk3588: Add PLL rate for 1500 MHz
At least one RK3588 clock (CPLL) uses 1.5 GHz, so let's add
that frequency to the PLL table.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Link: https://lore.kernel.org/r/20250408064612.41359-1-eagle.alexander923@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-10 14:28:14 +02:00
..
2025-03-14 16:20:23 +01:00
2025-03-07 11:05:01 -08:00
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