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8c10adaf33
Convert the actions,s700-pinctrl binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
205 lines
6.9 KiB
YAML
205 lines
6.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/actions,s700-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Actions Semi S700 Pin Controller
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maintainers:
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- Manivannan Sadhasivam <mani@kernel.org>
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properties:
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compatible:
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const: actions,s700-pinctrl
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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gpio-controller: true
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gpio-line-names:
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maxItems: 136
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gpio-ranges: true
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'#gpio-cells':
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const: 2
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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interrupts:
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maxItems: 5
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description:
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The interrupt outputs from the controller. There is one GPIO interrupt per
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GPIO bank. The interrupts must be ordered by bank, starting with
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bank 0.
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additionalProperties:
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type: object
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description: Pin configuration subnode
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additionalProperties: false
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properties:
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pinmux:
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description: Configure pin multiplexing.
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type: object
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$ref: /schemas/pinctrl/pinmux-node.yaml#
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additionalProperties: false
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properties:
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groups:
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items:
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enum: [
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rgmii_txd23_mfp, rgmii_rxd2_mfp, rgmii_rxd3_mfp, lcd0_d18_mfp,
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rgmii_txd01_mfp, rgmii_txd0_mfp, rgmii_txd1_mfp, rgmii_txen_mfp,
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rgmii_rxen_mfp, rgmii_rxd1_mfp, rgmii_rxd0_mfp, rgmii_ref_clk_mfp,
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i2c1_dummy, i2c2_dummy, i2s_d0_mfp, i2s_pcm1_mfp, i2s0_pcm0_mfp, i2s1_pcm0_mfp,
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i2s_d1_mfp, ks_in2_mfp, ks_in1_mfp, ks_in0_mfp, ks_in3_mfp,
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ks_out0_mfp, ks_out1_mfp, ks_out2_mfp, lvds_o_pn_mfp, dsi_dn0_mfp,
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dsi_dp2_mfp, lcd0_d2_mfp, dsi_dp3_mfp, dsi_dn3_mfp, dsi_dp0_mfp,
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lvds_ee_pn_mfp, uart2_rx_tx_mfp, spi0_i2c_pcm_mfp,
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dsi_dnp1_cp_d2_mfp, dsi_dnp1_cp_d17_mfp, lvds_e_pn_mfp,
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dsi_dn2_mfp, uart2_rtsb_mfp, uart2_ctsb_mfp, uart3_rtsb_mfp,
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uart3_ctsb_mfp, sd0_d0_mfp, sd0_d1_mfp, sd0_d2_d3_mfp,
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sd1_d0_d3_mfp, sd0_cmd_mfp, sd0_clk_mfp, sd1_cmd_mfp,
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uart0_rx_mfp, clko_25m_mfp, csi_cn_cp_mfp, sens0_ckout_mfp,
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uart0_tx_mfp, i2c0_mfp, csi_dn_dp_mfp, sen0_pclk_mfp, pcm1_in_mfp,
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pcm1_clk_mfp, pcm1_sync_mfp, pcm1_out_mfp, dnand_data_wr_mfp,
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dnand_acle_ce0_mfp, nand_ceb2_mfp, nand_ceb3_mfp
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]
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function:
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items:
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enum: [
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nor, eth_rgmii, eth_sgmii, spi0, spi1, spi2, spi3, seNs0, sens1,
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uart0, uart1, uart2, uart3, uart4, uart5, uart6, i2s0, i2s1, pcm1,
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pcm0, ks, jtag, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, p0, sd0, sd1,
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sd2, i2c0, i2c1, i2c2, i2c3, dsi, lvds, usb30, clko_25m, mipi_csi,
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nand, spdif, sirq0, sirq1, sirq2, bt, lcd0
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]
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required:
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- groups
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- function
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pinconf:
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description: Configure pin-specific parameters.
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type: object
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allOf:
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- $ref: /schemas/pinctrl/pincfg-node.yaml#
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- $ref: /schemas/pinctrl/pinmux-node.yaml#
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additionalProperties: false
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properties:
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groups:
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items:
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enum: [
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sirq_drv, rgmii_txd23_drv, rgmii_rxd23_drv, rgmii_txd01_txen_drv,
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rgmii_rxer_drv, rgmii_crs_drv, rgmii_rxd10_drv, rgmii_ref_clk_drv,
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smi_mdc_mdio_drv, i2s_d0_drv, i2s_bclk0_drv, i2s3_drv, i2s13_drv,
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pcm1_drv, ks_in_drv, ks_out_drv, lvds_all_drv, lcd_d18_d2_drv,
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dsi_all_drv, sd0_d0_d3_drv, sd0_cmd_drv, sd0_clk_drv,
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spi0_all_drv, uart0_rx_drv, uart0_tx_drv, uart2_all_drv,
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i2c0_all_drv, i2c12_all_drv, sens0_pclk_drv, sens0_ckout_drv,
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uart3_all_drv
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]
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pins:
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items:
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enum: [
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eth_txd0, eth_txd1, eth_txd2, eth_txd3, eth_txen, eth_rxer,
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eth_crs_dv, eth_rxd1, eth_rxd0, eth_rxd2, eth_rxd3, eth_ref_clk,
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eth_mdc, eth_mdio, sirq0, sirq1, sirq2, i2s_d0, i2s_bclk0,
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i2s_lrclk0, i2s_mclk0, i2s_d1, i2s_bclk1, i2s_lrclk1, i2s_mclk1,
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pcm1_in, pcm1_clk, pcm1_sync, pcm1_out, ks_in0, ks_in1, ks_in2,
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ks_in3, ks_out0, ks_out1, ks_out2, lvds_oep, lvds_oen, lvds_odp,
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lvds_odn, lvds_ocp, lvds_ocn, lvds_obp, lvds_obn, lvds_oap,
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lvds_oan, lvds_eep, lvds_een, lvds_edp, lvds_edn, lvds_ecp,
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lvds_ecn, lvds_ebp, lvds_ebn, lvds_eap, lvds_ean, lcd0_d18,
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lcd0_d2, dsi_dp3, dsi_dn3, dsi_dp1, dsi_dn1, dsi_cp, dsi_cn,
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dsi_dp0, dsi_dn0, dsi_dp2, dsi_dn2, sd0_d0, sd0_d1, sd0_d2,
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sd0_d3, sd1_d0, sd1_d1, sd1_d2, sd1_d3, sd0_cmd, sd0_clk, sd1_cmd,
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sd1_clk, spi0_ss, spi0_miso, uart0_rx, uart0_tx, uart2_rx,
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uart2_tx, uart2_rtsb, uart2_ctsb, uart3_rx, uart3_tx, uart3_rtsb,
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uart3_ctsb, i2c0_sclk, i2c0_sdata, i2c1_sclk, i2c1_sdata,
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i2c2_sclk, i2c2_sdata, csi_dn0, csi_dp0, csi_dn1, csi_dp1, csi_cn, csi_cp,
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csi_dn2, csi_dp2, csi_dn3, csi_dp3, sensor0_pclk, sensor0_ckout,
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dnand_d0, dnand_d1, dnand_d2, dnand_d3, dnand_d4, dnand_d5,
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dnand_d6, dnand_d7, dnand_wrb, dnand_rdb, dnand_rdbn, dnand_dqs,
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dnand_dqsn, dnand_rb0, dnand_ale, dnand_cle, dnand_ceb0,
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dnand_ceb1, dnand_ceb2, dnand_ceb3, porb, clko_25m, bsel, pkg0,
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pkg1, pkg2, pkg3
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]
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bias-pull-down:
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type: boolean
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bias-pull-up:
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type: boolean
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drive-strength:
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description: Selects the drive strength for the specified pins in mA.
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enum: [2, 4, 8, 12]
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input-schmitt-enable: true
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input-schmitt-disable: true
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oneOf:
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- required:
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- groups
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- required:
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- pins
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anyOf:
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- required: [ pinmux ]
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- required: [ pinconf ]
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required:
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- compatible
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- reg
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- clocks
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- gpio-controller
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- gpio-ranges
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- '#gpio-cells'
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- interrupt-controller
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- '#interrupt-cells'
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- interrupts
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pinctrl: pinctrl@e01b0000 {
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compatible = "actions,s700-pinctrl";
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reg = <0xe01b0000 0x1000>;
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clocks = <&cmu 1>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 136>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
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uart3-default {
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pinmux {
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groups = "uart3_rtsb_mfp", "uart3_ctsb_mfp";
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function = "uart3";
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};
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pinconf {
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groups = "uart3_all_drv";
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drive-strength = <2>;
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};
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};
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};
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