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The GCE Mailbox needs only one clock and the clock-names can be used only by the driver (which, for instance, does not use it), and this is true for all of the currently supported MediaTek SoCs. Stop requiring to specify clock-names on all non-MT8195 GCEs. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
84 lines
1.9 KiB
YAML
84 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek Global Command Engine Mailbox
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maintainers:
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- Houlong Wei <houlong.wei@mediatek.com>
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description:
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The Global Command Engine (GCE) is used to help read/write registers with
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critical time limitation, such as updating display configuration during the
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vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
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properties:
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compatible:
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oneOf:
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- enum:
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- mediatek,mt6779-gce
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- mediatek,mt8173-gce
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- mediatek,mt8183-gce
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- mediatek,mt8186-gce
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- mediatek,mt8188-gce
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- mediatek,mt8192-gce
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- mediatek,mt8195-gce
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- mediatek,mt8196-gce
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- items:
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- const: mediatek,mt6795-gce
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- const: mediatek,mt8173-gce
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"#mbox-cells":
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const: 2
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description:
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The first cell describes the Thread ID of the GCE,
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the second cell describes the priority of the GCE thread
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Global Command Engine clock
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clock-names:
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items:
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- const: gce
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iommus:
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maxItems: 1
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required:
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- compatible
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- "#mbox-cells"
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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gce: mailbox@10212000 {
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compatible = "mediatek,mt8173-gce";
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reg = <0 0x10212000 0 0x1000>;
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interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
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#mbox-cells = <2>;
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clocks = <&infracfg CLK_INFRA_GCE>;
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clock-names = "gce";
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};
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};
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