Clay King 306cbcc6f6 drm/amd/display: incorrect conditions for failing dto calculations ...

[Why & How]
Previously, when calculating dto phase, we would incorrectly fail when phase
<=0 without additionally checking for the integer value. This meant that
calculations would incorrectly fail when the desired pixel clock was an exact
multiple of the reference clock.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Clay King <clayking@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2025-08-29 10:14:05 -04:00

..

dcn401_dccg.c

drm/amd/display: incorrect conditions for failing dto calculations

2025-08-29 10:14:05 -04:00

dcn401_dccg.h

drm/amd/display: Add num_slices_h to set_dto_dscclk signature

2025-06-24 09:58:17 -04:00