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Camille Cho 7530d91463 drm/amd/display: To update backlight restore mechanism

[Why]
Cached backlight is never being updated since panel_cntl specific
registers were moved from abm to panel_cntl.

[How]
Update cached backlight in set_abm_immediate_disable as what we used to
do. Also, update the priority of backlight restore mechanism so that
cached backlight has the highest priority since it is always correct.

Signed-off-by: Camille Cho <Camille.Cho@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2020-11-24 12:08:56 -05:00

dcn21_dccg.c

drm/amd/display: cap dpp dto phase not more than modulo.

2020-11-10 14:26:18 -05:00

dcn21_dccg.h

drm/amd/display: update dpp dto phase and modulo.

2020-11-10 14:25:38 -05:00

dcn21_hubbub.c

drm/amd/display: Populate hostvm parameter before DML calculation

2020-11-16 12:18:44 -05:00

dcn21_hubbub.h

drm/amd/display: optimize prgoram wm and clks