Xi Liu 398a16e1f0 drm/amd/display: increase bb clock for DCN351 ...

[Why and how]

Bounding box clocks for DCN351 should be increased as per request

Reviewed-by: Swapnil Patel <swapnil.patel@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Xi Liu <xi.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2024-03-22 15:49:21 -04:00

..

calcs

drm/amd/display: Refactor resource into component directory

2023-11-17 09:30:50 -05:00

dcn10

drm/amd/display: move remaining FPU code to dml folder

2022-10-27 15:12:08 -04:00

dcn20

drm/amd/display: add nv12 bounding box

2024-01-05 16:05:02 -05:00

dcn21

drm/amd/display: Initialize necessary uninitialized variables

2023-07-18 11:15:38 -04:00

dcn30

drm/amd/display: Ensure populate uclk in bb construction

2024-01-15 18:35:39 -05:00

dcn31

drm/amd/display: Move define to the proper header

2024-03-20 13:38:12 -04:00

dcn32

drm/amd/display: Revert Remove pixle rate limit for subvp

2024-03-20 13:12:59 -04:00

dcn35

drm/amd/display: Increase Z8 watermark times.

2024-03-22 15:49:00 -04:00

dcn301

drm/amd/display: Clean FPGA code in dc

2023-06-09 10:44:11 -04:00

dcn302

drm/amd/display: move FPU associated DCN302 code to DML folder (#2266)

2022-01-18 17:42:26 -05:00

dcn303

drm/amd/display: Ensure populate uclk in bb construction

2024-01-15 18:35:39 -05:00

dcn314

drm/amd/display: Fix DML calculation errors

2023-09-11 17:15:23 -04:00

dcn321

drm/amd/display: Introduce DML2

2023-10-09 16:48:51 -04:00

dcn351

drm/amd/display: increase bb clock for DCN351

2024-03-22 15:49:21 -04:00

dsc

drm/amd/display: Make some symbols static

2022-10-24 14:34:47 -04:00

dc_features.h

drm/amd/display: Increase num voltage states to 40

2023-11-29 16:48:59 -05:00

display_mode_enums.h

drm/amd/display: Add Error Code for Dml Validation Failure

2023-06-15 10:44:13 -04:00

display_mode_lib.c

drm/amd/display: Clean FPGA code in dc

2023-06-09 10:44:11 -04:00

display_mode_lib.h

drm/amd/display: Clean FPGA code in dc

2023-06-09 10:44:11 -04:00

display_mode_structs.h

drm/amd/display: Add Clock Table Entry With Max DC Values

2023-06-23 15:40:50 -04:00

display_mode_vba.c

drm/amd/display: Fix up kdoc formatting in display_mode_vba.c

2023-06-09 12:33:46 -04:00

display_mode_vba.h

drm/amd/display: Set max vratio for prefetch to 7.9 for YUV420 MPO

2023-02-14 15:47:26 -05:00

display_rq_dlg_helpers.c

drm/amdgpu/display: Remove t_srx_delay_us.

2022-01-27 15:47:34 -05:00

display_rq_dlg_helpers.h

drm/amd/display: Pass all structs in display_rq_dlg_helpers by pointer

2021-09-23 15:17:29 -04:00

dml1_display_rq_dlg_calc.c

drm/amdgpu/display: Remove t_srx_delay_us.

2022-01-27 15:47:34 -05:00

dml1_display_rq_dlg_calc.h

drm/amd/display: Fix rest of pass-by-value structs in DML

2021-09-23 15:17:30 -04:00

dml_inline_defs.h

drm/amd/display: Optimizations for DML math

2022-09-13 14:32:59 -04:00

dml_logger.h

drm/amd/display: Use MACROS instead of dm_logger

2018-03-14 15:08:45 -05:00

Makefile

drm/amd/display: add DC changes for DCN351

2024-03-04 15:59:08 -05:00