Files
linux/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
Sebastian Reichel b0c4f44b87 dt-bindings: power: rockchip: add regulator support
Add optional support for a voltage supply required to enable a
power domain. The binding follows the way it is handled by the
Mediatek binding to keep things consistent.

This will initially be used by the RK3588 GPU power domain, which
fails to be enabled when the GPU regulator is not enabled. It is
not limited to that platform, since older generations have similar
requirements. They worked around this by marking the regulators
as always-on instead of describing the dependency.

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250220-rk3588-gpu-pwr-domain-regulator-v6-6-a4f9c24e5b81@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-02-28 12:48:57 +01:00

259 lines
7.5 KiB
YAML

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip Power Domains
maintainers:
- Elaine Zhang <zhangqing@rock-chips.com>
- Heiko Stuebner <heiko@sntech.de>
description: |
Rockchip processors include support for multiple power domains
which can be powered up/down by software based on different
application scenarios to save power.
Power domains contained within power-controller node are
generic power domain providers documented in
Documentation/devicetree/bindings/power/power-domain.yaml.
IP cores belonging to a power domain should contain a
"power-domains" property that is a phandle for the
power domain node representing the domain.
properties:
$nodename:
const: power-controller
compatible:
enum:
- rockchip,px30-power-controller
- rockchip,rk3036-power-controller
- rockchip,rk3066-power-controller
- rockchip,rk3128-power-controller
- rockchip,rk3188-power-controller
- rockchip,rk3228-power-controller
- rockchip,rk3288-power-controller
- rockchip,rk3328-power-controller
- rockchip,rk3366-power-controller
- rockchip,rk3368-power-controller
- rockchip,rk3399-power-controller
- rockchip,rk3568-power-controller
- rockchip,rk3576-power-controller
- rockchip,rk3588-power-controller
- rockchip,rv1126-power-controller
"#power-domain-cells":
const: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
required:
- compatible
- "#power-domain-cells"
additionalProperties: false
patternProperties:
"^power-domain@[0-9a-f]+$":
$ref: "#/$defs/pd-node"
unevaluatedProperties: false
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^power-domain@[0-9a-f]+$":
$ref: "#/$defs/pd-node"
unevaluatedProperties: false
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^power-domain@[0-9a-f]+$":
$ref: "#/$defs/pd-node"
unevaluatedProperties: false
properties:
"#power-domain-cells":
const: 0
$defs:
pd-node:
type: object
description: |
Represents the power domains within the power controller node.
properties:
reg:
maxItems: 1
description: |
Power domain index. Valid values are defined in
"include/dt-bindings/power/px30-power.h"
"include/dt-bindings/power/rk3036-power.h"
"include/dt-bindings/power/rk3066-power.h"
"include/dt-bindings/power/rk3128-power.h"
"include/dt-bindings/power/rk3188-power.h"
"include/dt-bindings/power/rk3228-power.h"
"include/dt-bindings/power/rk3288-power.h"
"include/dt-bindings/power/rk3328-power.h"
"include/dt-bindings/power/rk3366-power.h"
"include/dt-bindings/power/rk3368-power.h"
"include/dt-bindings/power/rk3399-power.h"
"include/dt-bindings/power/rk3568-power.h"
"include/dt-bindings/power/rk3588-power.h"
"include/dt-bindings/power/rockchip,rv1126-power.h"
clocks:
minItems: 1
maxItems: 30
description: |
A number of phandles to clocks that need to be enabled
while power domain switches state.
domain-supply:
description: domain regulator supply.
pm_qos:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
maxItems: 1
description: |
A number of phandles to qos blocks which need to be saved and restored
while power domain switches state.
"#power-domain-cells":
enum: [0, 1]
description:
Must be 0 for nodes representing a single PM domain and 1 for nodes
providing multiple PM domains.
required:
- reg
- "#power-domain-cells"
examples:
- |
#include <dt-bindings/clock/rk3399-cru.h>
#include <dt-bindings/power/rk3399-power.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
qos_hdcp: qos@ffa90000 {
compatible = "rockchip,rk3399-qos", "syscon";
reg = <0x0 0xffa90000 0x0 0x20>;
};
qos_iep: qos@ffa98000 {
compatible = "rockchip,rk3399-qos", "syscon";
reg = <0x0 0xffa98000 0x0 0x20>;
};
qos_rga_r: qos@ffab0000 {
compatible = "rockchip,rk3399-qos", "syscon";
reg = <0x0 0xffab0000 0x0 0x20>;
};
qos_rga_w: qos@ffab0080 {
compatible = "rockchip,rk3399-qos", "syscon";
reg = <0x0 0xffab0080 0x0 0x20>;
};
qos_video_m0: qos@ffab8000 {
compatible = "rockchip,rk3399-qos", "syscon";
reg = <0x0 0xffab8000 0x0 0x20>;
};
qos_video_m1_r: qos@ffac0000 {
compatible = "rockchip,rk3399-qos", "syscon";
reg = <0x0 0xffac0000 0x0 0x20>;
};
qos_video_m1_w: qos@ffac0080 {
compatible = "rockchip,rk3399-qos", "syscon";
reg = <0x0 0xffac0080 0x0 0x20>;
};
power-management@ff310000 {
compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
reg = <0x0 0xff310000 0x0 0x1000>;
power-controller {
compatible = "rockchip,rk3399-power-controller";
#power-domain-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
/* These power domains are grouped by VD_CENTER */
power-domain@RK3399_PD_IEP {
reg = <RK3399_PD_IEP>;
clocks = <&cru ACLK_IEP>,
<&cru HCLK_IEP>;
pm_qos = <&qos_iep>;
#power-domain-cells = <0>;
};
power-domain@RK3399_PD_RGA {
reg = <RK3399_PD_RGA>;
clocks = <&cru ACLK_RGA>,
<&cru HCLK_RGA>;
pm_qos = <&qos_rga_r>,
<&qos_rga_w>;
#power-domain-cells = <0>;
};
power-domain@RK3399_PD_VCODEC {
reg = <RK3399_PD_VCODEC>;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
pm_qos = <&qos_video_m0>;
#power-domain-cells = <0>;
};
power-domain@RK3399_PD_VDU {
reg = <RK3399_PD_VDU>;
clocks = <&cru ACLK_VDU>,
<&cru HCLK_VDU>;
pm_qos = <&qos_video_m1_r>,
<&qos_video_m1_w>;
#power-domain-cells = <0>;
};
power-domain@RK3399_PD_VIO {
reg = <RK3399_PD_VIO>;
#power-domain-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
power-domain@RK3399_PD_HDCP {
reg = <RK3399_PD_HDCP>;
clocks = <&cru ACLK_HDCP>,
<&cru HCLK_HDCP>,
<&cru PCLK_HDCP>;
pm_qos = <&qos_hdcp>;
#power-domain-cells = <0>;
};
};
};
};
};