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da2d16fcdd
[Why] Intermittent reboot hangs are observed introduced by "Improve x86 and dmub ips handshake". [How] Bring back the commit but fix the polling. Avoid hanging in place forever by bounding the delay and ensure that we still message DMCUB on IPS2 exit to notify driver idle has been cleared. Reviewed-by: Duncan Ma <duncan.ma@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
172 lines
7.6 KiB
C
172 lines
7.6 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright 2023 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dce110/dce110_hwseq.h"
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#include "dcn10/dcn10_hwseq.h"
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#include "dcn20/dcn20_hwseq.h"
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#include "dcn21/dcn21_hwseq.h"
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#include "dcn30/dcn30_hwseq.h"
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#include "dcn301/dcn301_hwseq.h"
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#include "dcn31/dcn31_hwseq.h"
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#include "dcn32/dcn32_hwseq.h"
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#include "dcn35/dcn35_hwseq.h"
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#include "dcn35_init.h"
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static const struct hw_sequencer_funcs dcn35_funcs = {
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.program_gamut_remap = dcn30_program_gamut_remap,
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.init_hw = dcn35_init_hw,
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.power_down_on_boot = dcn35_power_down_on_boot,
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.apply_ctx_to_hw = dce110_apply_ctx_to_hw,
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.apply_ctx_for_surface = NULL,
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.program_front_end_for_ctx = dcn20_program_front_end_for_ctx,
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.wait_for_pending_cleared = dcn10_wait_for_pending_cleared,
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.post_unlock_program_front_end = dcn20_post_unlock_program_front_end,
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.update_plane_addr = dcn20_update_plane_addr,
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.update_dchub = dcn10_update_dchub,
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.update_pending_status = dcn10_update_pending_status,
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.program_output_csc = dcn20_program_output_csc,
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.enable_accelerated_mode = dce110_enable_accelerated_mode,
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.enable_timing_synchronization = dcn10_enable_timing_synchronization,
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.enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
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.update_info_frame = dcn31_update_info_frame,
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.send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
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.enable_stream = dcn20_enable_stream,
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.disable_stream = dce110_disable_stream,
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.unblank_stream = dcn32_unblank_stream,
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.blank_stream = dce110_blank_stream,
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.enable_audio_stream = dce110_enable_audio_stream,
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.disable_audio_stream = dce110_disable_audio_stream,
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.disable_plane = dcn35_disable_plane,
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.disable_pixel_data = dcn20_disable_pixel_data,
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.pipe_control_lock = dcn20_pipe_control_lock,
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.interdependent_update_lock = dcn10_lock_all_pipes,
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.cursor_lock = dcn10_cursor_lock,
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.prepare_bandwidth = dcn35_prepare_bandwidth,
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.optimize_bandwidth = dcn35_optimize_bandwidth,
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.update_bandwidth = dcn20_update_bandwidth,
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.set_drr = dcn10_set_drr,
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.get_position = dcn10_get_position,
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.set_static_screen_control = dcn30_set_static_screen_control,
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.setup_stereo = dcn10_setup_stereo,
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.set_avmute = dcn30_set_avmute,
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.log_hw_state = dcn10_log_hw_state,
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.get_hw_state = dcn10_get_hw_state,
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.clear_status_bits = dcn10_clear_status_bits,
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.wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
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.edp_backlight_control = dce110_edp_backlight_control,
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.edp_power_control = dce110_edp_power_control,
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.edp_wait_for_T12 = dce110_edp_wait_for_T12,
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.edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
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.set_cursor_position = dcn10_set_cursor_position,
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.set_cursor_attribute = dcn10_set_cursor_attribute,
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.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
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.setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
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.set_clock = dcn10_set_clock,
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.get_clock = dcn10_get_clock,
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.program_triplebuffer = dcn20_program_triple_buffer,
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.enable_writeback = dcn30_enable_writeback,
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.disable_writeback = dcn30_disable_writeback,
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.update_writeback = dcn30_update_writeback,
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.mmhubbub_warmup = dcn30_mmhubbub_warmup,
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.dmdata_status_done = dcn20_dmdata_status_done,
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.program_dmdata_engine = dcn30_program_dmdata_engine,
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.set_dmdata_attributes = dcn20_set_dmdata_attributes,
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.init_sys_ctx = dcn31_init_sys_ctx,
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.init_vm_ctx = dcn20_init_vm_ctx,
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.set_flip_control_gsl = dcn20_set_flip_control_gsl,
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.get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
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.calc_vupdate_position = dcn10_calc_vupdate_position,
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.power_down = dce110_power_down,
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.set_backlight_level = dcn21_set_backlight_level,
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.set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
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.set_pipe = dcn21_set_pipe,
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.enable_lvds_link_output = dce110_enable_lvds_link_output,
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.enable_tmds_link_output = dce110_enable_tmds_link_output,
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.enable_dp_link_output = dce110_enable_dp_link_output,
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.disable_link_output = dcn32_disable_link_output,
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.z10_restore = dcn35_z10_restore,
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.z10_save_init = dcn31_z10_save_init,
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.set_disp_pattern_generator = dcn30_set_disp_pattern_generator,
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.optimize_pwr_state = dcn21_optimize_pwr_state,
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.exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,
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.update_visual_confirm_color = dcn10_update_visual_confirm_color,
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.apply_idle_power_optimizations = dcn35_apply_idle_power_optimizations,
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.update_dsc_pg = dcn32_update_dsc_pg,
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.calc_blocks_to_gate = dcn35_calc_blocks_to_gate,
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.calc_blocks_to_ungate = dcn35_calc_blocks_to_ungate,
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.block_power_control = dcn35_block_power_control,
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.root_clock_control = dcn35_root_clock_control,
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.set_idle_state = dcn35_set_idle_state,
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.get_idle_state = dcn35_get_idle_state
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};
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static const struct hwseq_private_funcs dcn35_private_funcs = {
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.init_pipes = dcn35_init_pipes,
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.update_plane_addr = dcn20_update_plane_addr,
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.plane_atomic_disconnect = dcn10_plane_atomic_disconnect,
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.update_mpcc = dcn20_update_mpcc,
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.set_input_transfer_func = dcn32_set_input_transfer_func,
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.set_output_transfer_func = dcn32_set_output_transfer_func,
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.power_down = dce110_power_down,
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.enable_display_power_gating = dcn10_dummy_display_power_gating,
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.blank_pixel_data = dcn20_blank_pixel_data,
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.reset_hw_ctx_wrap = dcn31_reset_hw_ctx_wrap,
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.enable_stream_timing = dcn20_enable_stream_timing,
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.edp_backlight_control = dce110_edp_backlight_control,
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.setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt,
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.did_underflow_occur = dcn10_did_underflow_occur,
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.init_blank = dcn20_init_blank,
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.disable_vga = NULL,
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.bios_golden_init = dcn10_bios_golden_init,
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.plane_atomic_disable = dcn35_plane_atomic_disable,
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//.plane_atomic_disable = dcn20_plane_atomic_disable,/*todo*/
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//.hubp_pg_control = dcn35_hubp_pg_control,
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.enable_power_gating_plane = dcn35_enable_power_gating_plane,
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.dpp_root_clock_control = dcn35_dpp_root_clock_control,
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.program_all_writeback_pipes_in_tree = dcn30_program_all_writeback_pipes_in_tree,
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.update_odm = dcn35_update_odm,
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.set_hdr_multiplier = dcn10_set_hdr_multiplier,
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.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
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.wait_for_blank_complete = dcn20_wait_for_blank_complete,
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.dccg_init = dcn20_dccg_init,
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.set_mcm_luts = dcn32_set_mcm_luts,
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.setup_hpo_hw_control = dcn35_setup_hpo_hw_control,
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.calculate_dccg_k1_k2_values = dcn32_calculate_dccg_k1_k2_values,
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.set_pixels_per_cycle = dcn32_set_pixels_per_cycle,
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.is_dp_dig_pixel_rate_div_policy = dcn32_is_dp_dig_pixel_rate_div_policy,
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.dsc_pg_control = dcn35_dsc_pg_control,
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.dsc_pg_status = dcn32_dsc_pg_status,
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.enable_plane = dcn35_enable_plane,
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};
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void dcn35_hw_sequencer_construct(struct dc *dc)
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{
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dc->hwss = dcn35_funcs;
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dc->hwseq->funcs = dcn35_private_funcs;
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}
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