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352f4a6bb1
Add compatible string "nxp,imx94-adc" and "nxp,imx95-adc", which is backward compatible with i.MX93. Set it to fall back to "nxp,imx93-adc". Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250306170825.239933-1-Frank.Li@nxp.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
87 lines
2.2 KiB
YAML
87 lines
2.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP iMX93 ADC
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maintainers:
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- Haibo Chen <haibo.chen@nxp.com>
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description:
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The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
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connected to pins. it support normal and inject mode, include
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One-Shot and Scan (continuous) conversions. Programmable DMA
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enables for each channel Also this ADC contain alternate analog
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watchdog thresholds, select threshold through input ports. And
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also has Self-test logic and Software-initiated calibration.
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properties:
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compatible:
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oneOf:
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- enum:
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- nxp,imx93-adc
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- items:
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- enum:
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- nxp,imx94-adc
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- nxp,imx95-adc
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- const: nxp,imx93-adc
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: WDGnL, watchdog threshold interrupt requests.
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- description: WDGnH, watchdog threshold interrupt requests.
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- description: normal conversion, include EOC (End of Conversion),
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ECH (End of Chain), JEOC (End of Injected Conversion) and
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JECH (End of injected Chain).
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clocks:
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maxItems: 1
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clock-names:
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const: ipg
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vref-supply:
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description:
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The reference voltage which used to establish channel scaling.
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"#io-channel-cells":
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- vref-supply
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- "#io-channel-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/imx93-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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adc@44530000 {
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compatible = "nxp,imx93-adc";
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reg = <0x44530000 0x10000>;
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interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX93_CLK_ADC1_GATE>;
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clock-names = "ipg";
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vref-supply = <®_vref_1v8>;
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#io-channel-cells = <1>;
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};
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};
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...
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