mirror of
https://github.com/torvalds/linux.git
synced 2026-04-23 00:55:48 -04:00
Pull devicetree updates from Rob Herring:
"DT Bindings:
- Convert all remaining interrupt-controller bindings to DT schema
- Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
PMC, imx-drm, and ftm-quaddec to DT schema
- Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard
- Add top-level constraints for renesas,vsp1 and renesas,fcp
- Add missing constraint in amlogic,pinctrl-a4 'group' nodes
- Adjust the allowed properties for dwc3-xilinx, sony,imx219,
pci-iommu, and renesas,dsi
- Add EcoNet vendor prefix
- Fix the reserved-memory.yaml in fsl,qman-fqd
- Drop obsolete numa.txt and cpu-topology.txt which are schemas in
dtschema now
- Drop Renesas RZ/N1S bindings
- Ensure Arm cpu nodes don't allow undocumented properties. Add all
the properties which are in use and undocumented. Drop the Mediatek
cpufreq binding which is not a binding, but just what DT properties
the driver uses.
- Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU
- Update documentation on defining child nodes with separate schemas
- Add bindings to PSCI MAINTAINERS entry
DT core:
- Add new functions to simplify driver handling of 'memory-region'
properties. Users to be added next cycle.
- Simplify of_dma_set_restricted_buffer() to use
of_for_each_phandle()
- Add missing unlock on error in unittest_data_add()"
* tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (87 commits)
dt-bindings: timer: Add fsl,vf610-pit.yaml
dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC
ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card
dt-bindings: arm/cpus: Allow 2 power-domains entries
dt-bindings: usb: dwc3-xilinx: allow dma-coherent
media: dt-bindings: sony,imx219: Allow props from video-interface-devices
dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block
dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt
dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties
dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml
dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller
dt-bindings: trivial-devices: Add VZ89TE to trivial
media: dt-bindings: renesas,vsp1: add top-level constraints
media: dt-bindings: renesas,fcp: add top-level constraints
dt-bindings: trivial-devices: Add Maxim max30208
dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference
dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema
dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema
dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema
dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema
...
134 lines
3.0 KiB
YAML
134 lines
3.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/renesas,vsp1.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas VSP Video Processing Engine
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maintainers:
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- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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description:
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The VSP is a video processing engine that supports up-/down-scaling, alpha
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blending, color space conversion and various other image processing features.
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It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs.
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properties:
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compatible:
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oneOf:
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- enum:
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- renesas,r9a07g044-vsp2 # RZ/G2L
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- renesas,vsp1 # R-Car Gen2 and RZ/G1
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- renesas,vsp2 # R-Car Gen3 and RZ/G2
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- items:
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- enum:
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- renesas,r9a07g043u-vsp2 # RZ/G2UL
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- renesas,r9a07g054-vsp2 # RZ/V2L
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- renesas,r9a09g057-vsp2 # RZ/V2H(P)
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- const: renesas,r9a07g044-vsp2 # RZ/G2L fallback
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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items:
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- description: Main clock
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- description: Register access clock
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- description: Video clock
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clock-names:
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items:
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- const: aclk
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- const: pclk
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- const: vclk
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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renesas,fcp:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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A phandle referencing the FCP that handles memory accesses for the VSP.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- power-domains
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- resets
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additionalProperties: false
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: renesas,vsp1
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then:
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properties:
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renesas,fcp: false
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else:
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required:
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- renesas,fcp
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r9a07g044-vsp2
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then:
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properties:
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clocks:
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minItems: 3
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required:
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- clock-names
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else:
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properties:
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clocks:
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maxItems: 1
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clock-names: false
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examples:
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# R8A7790 (R-Car H2) VSP1-S
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- |
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7790-sysc.h>
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vsp@fe928000 {
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compatible = "renesas,vsp1";
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reg = <0xfe928000 0x8000>;
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interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 131>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 131>;
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};
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# R8A77951 (R-Car H3) VSP2-BC
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- |
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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vsp@fe920000 {
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compatible = "renesas,vsp2";
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reg = <0xfe920000 0x8000>;
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interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 624>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 624>;
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renesas,fcp = <&fcpvb1>;
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};
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...
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