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Add a new schema which extends opp-v2 to support a new vendor specific property required for Adreno GPUs found in Qualcomm's SoCs. The new property called "qcom,opp-acd-level" carries a u32 value recommended for each opp needs to be shared to GMU during runtime. Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml. Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Tested-by: Maya Matuszczyk <maccraft123mc@gmail.com> Tested-by: Anthony Ruhier <aruhier@mailbox.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649351/ Signed-off-by: Rob Clark <robdclark@chromium.org>
97 lines
2.7 KiB
YAML
97 lines
2.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Adreno compatible OPP supply
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description:
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Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific
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ACD related information tailored for the specific chipset. This binding
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provides the information needed to describe such a hardware value.
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maintainers:
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- Rob Clark <robdclark@gmail.com>
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allOf:
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- $ref: opp-v2-base.yaml#
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properties:
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compatible:
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contains:
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const: operating-points-v2-adreno
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patternProperties:
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'^opp-[0-9]+$':
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type: object
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additionalProperties: false
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properties:
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opp-hz: true
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opp-level: true
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opp-peak-kBps: true
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opp-supported-hw: true
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qcom,opp-acd-level:
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description: |
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A positive value representing the ACD (Adaptive Clock Distribution,
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a fancy name for clk throttling during voltage droop) level associated
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with this OPP node. This value is shared to a co-processor inside GPU
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(called Graphics Management Unit a.k.a GMU) during wake up. It may not
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be present for some OPPs and GMU will disable ACD while transitioning
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to that OPP. This value encodes a voltage threshold, delay cycles &
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calibration margins which are identified by characterization of the
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SoC. So, it doesn't have any unit. This data is passed to GMU firmware
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via 'HFI_H2F_MSG_ACD' packet.
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$ref: /schemas/types.yaml#/definitions/uint32
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required:
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- opp-hz
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- opp-level
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required:
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- compatible
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/power/qcom-rpmpd.h>
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gpu_opp_table: opp-table {
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compatible = "operating-points-v2-adreno", "operating-points-v2";
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opp-687000000 {
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opp-hz = /bits/ 64 <687000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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opp-peak-kBps = <8171875>;
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qcom,opp-acd-level = <0x882e5ffd>;
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};
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opp-550000000 {
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opp-hz = /bits/ 64 <550000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
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opp-peak-kBps = <6074219>;
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qcom,opp-acd-level = <0xc0285ffd>;
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};
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opp-390000000 {
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opp-hz = /bits/ 64 <390000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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opp-peak-kBps = <3000000>;
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qcom,opp-acd-level = <0xc0285ffd>;
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};
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opp-300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
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opp-peak-kBps = <2136719>;
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/* Intentionally left out qcom,opp-acd-level property here */
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};
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};
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