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56c36f590a
The doorbell register on GB20x GPUs has additional fields. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
31 lines
634 B
C
31 lines
634 B
C
/* SPDX-License-Identifier: MIT
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*
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* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
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*/
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#include "gpu.h"
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#include <engine/fifo/priv.h>
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#include <nvif/class.h>
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const struct nvkm_rm_gpu
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gh100_gpu = {
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.usermode.class = HOPPER_USERMODE_A,
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.fifo.chan = {
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.class = HOPPER_CHANNEL_GPFIFO_A,
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.doorbell_handle = tu102_chan_doorbell_handle,
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},
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.ce.class = HOPPER_DMA_COPY_A,
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.gr.class = {
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.i2m = KEPLER_INLINE_TO_MEMORY_B,
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.twod = FERMI_TWOD_A,
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.threed = HOPPER_A,
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.compute = HOPPER_COMPUTE_A,
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},
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.nvdec.class = NVB8B0_VIDEO_DECODER,
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.nvjpg.class = NVB8D1_VIDEO_NVJPG,
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.ofa.class = NVB8FA_VIDEO_OFA,
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};
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