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44f93b209e
This commit enables basic support for Hopper GPUs, and is intended primarily as a base supporting Blackwell GPUs, which reuse most of the code added here. Advanced features such as Confidential Compute are not supported. Beyond a few miscellaneous register moves and HW class ID plumbing, the bulk of the changes implemented here are to support the GSP-RM boot sequence used on Hopper/Blackwell GPUs, as well as a new page table layout. There should be no changes here that impact prior GPUs. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Co-developed-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Timur Tabi <ttabi@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
29 lines
751 B
C
29 lines
751 B
C
/* SPDX-License-Identifier: MIT
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*
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* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
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*/
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#include "priv.h"
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#include <nvhw/ref/gh100/pri_nv_xal_ep.h>
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static void
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gh100_instmem_set_bar0_window_addr(struct nvkm_device *device, u64 addr)
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{
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nvkm_wr32(device, NV_XAL_EP_BAR0_WINDOW, addr >> NV_XAL_EP_BAR0_WINDOW_BASE_SHIFT);
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}
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static const struct nvkm_instmem_func
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gh100_instmem = {
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.fini = nv50_instmem_fini,
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.memory_new = nv50_instobj_new,
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.memory_wrap = nv50_instobj_wrap,
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.set_bar0_window_addr = gh100_instmem_set_bar0_window_addr,
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};
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int
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gh100_instmem_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
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struct nvkm_instmem **pimem)
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{
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return r535_instmem_new(&gh100_instmem, device, type, inst, pimem);
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}
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