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The Allwinner H6 and some later SoCs contain some bits in the PRCM (Power Reset Clock Management) block that control some power domains. Those power domains include the one for the GPU, the PLLs and some analogue circuits. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250416224839.9840-2-andre.przywara@arm.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
43 lines
923 B
YAML
43 lines
923 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/power/allwinner,sun50i-h6-prcm-ppu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner SoCs PRCM power domain controller
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maintainers:
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- Andre Przywara <andre.przywara@arm.com>
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description:
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The Allwinner Power Reset Clock Management (PRCM) unit contains bits to
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control a few power domains.
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properties:
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compatible:
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enum:
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- allwinner,sun50i-h6-prcm-ppu
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- allwinner,sun50i-h616-prcm-ppu
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- allwinner,sun55i-a523-prcm-ppu
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reg:
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maxItems: 1
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'#power-domain-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#power-domain-cells'
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additionalProperties: false
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examples:
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- |
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prcm_ppu: power-controller@7010210 {
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compatible = "allwinner,sun50i-h616-prcm-ppu";
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reg = <0x7010210 0x10>;
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#power-domain-cells = <1>;
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};
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