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Add a new driver, qat_6xxx, to support QAT GEN6 devices. QAT GEN6 devices are a follow-on generation of GEN4 devices and differently from the previous generation, they can support all three services (symmetric, asymmetric, and data compression) concurrently. In order to have the qat_6xxx driver to reuse some of the GEN4 logic, a new abstraction layer has been introduced to bridge the two implementations. This allows to avoid code duplication and to keep the qat_6xxx driver isolated from the GEN4 logic. This approach has been used for the PF to VF logic and the HW CSR access logic. Signed-off-by: Laurent M Coquerel <laurent.m.coquerel@intel.com> Co-developed-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: George Abraham P <george.abraham.p@intel.com> Co-developed-by: Karthikeyan Gopal <karthikeyan.gopal@intel.com> Signed-off-by: Karthikeyan Gopal <karthikeyan.gopal@intel.com> Co-developed-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
20 lines
317 B
C
20 lines
317 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright(c) 2023 Intel Corporation */
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#ifndef ADF_FW_CONFIG_H_
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#define ADF_FW_CONFIG_H_
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enum adf_fw_objs {
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ADF_FW_SYM_OBJ,
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ADF_FW_ASYM_OBJ,
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ADF_FW_DC_OBJ,
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ADF_FW_ADMIN_OBJ,
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ADF_FW_CY_OBJ,
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};
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struct adf_fw_config {
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u32 ae_mask;
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enum adf_fw_objs obj;
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};
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#endif
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