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FWSEC-FRTS is run with the desired address of the FRTS region as parameter, which we need to compute depending on some hardware parameters. Do this in a `FbLayout` structure, that will be later extended to describe more memory regions used to boot the GSP. Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Link: https://lore.kernel.org/r/20250619-nova-frts-v6-20-ecf41ef99252@nvidia.com [ In doc-comment of FbLayout s/bootup process/boot process/ - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
37 lines
831 B
Rust
37 lines
831 B
Rust
// SPDX-License-Identifier: GPL-2.0
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use kernel::prelude::*;
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use crate::driver::Bar0;
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use crate::fb::hal::FbHal;
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use crate::regs;
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fn vidmem_size_ga102(bar: &Bar0) -> u64 {
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regs::NV_USABLE_FB_SIZE_IN_MB::read(bar).usable_fb_size()
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}
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struct Ga102;
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impl FbHal for Ga102 {
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fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 {
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super::ga100::read_sysmem_flush_page_ga100(bar)
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}
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fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result {
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super::ga100::write_sysmem_flush_page_ga100(bar, addr);
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Ok(())
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}
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fn supports_display(&self, bar: &Bar0) -> bool {
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super::ga100::display_enabled_ga100(bar)
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}
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fn vidmem_size(&self, bar: &Bar0) -> u64 {
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vidmem_size_ga102(bar)
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}
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}
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const GA102: Ga102 = Ga102;
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pub(super) const GA102_HAL: &dyn FbHal = &GA102;
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