mirror of
https://github.com/torvalds/linux.git
synced 2026-04-23 09:05:50 -04:00
2f466d33f5
Pull PCI changes from Bjorn Helgaas:
"Resource management
- Fix host bridge window coalescing (Alexey Neyman)
- Pass type, width, and prefetchability for window alignment (Wei Yang)
PCI device hotplug
- Convert acpiphp, acpiphp_ibm to dynamic debug (Lan Tianyu)
Power management
- Remove pci_pm_complete() (Liu Chuansheng)
MSI
- Fail initialization if device is not in PCI_D0 (Yijing Wang)
MPS (Max Payload Size)
- Use pcie_get_mps() and pcie_set_mps() to simplify code (Yijing Wang)
- Use pcie_set_readrq() to simplify code (Yijing Wang)
- Use cached pci_dev->pcie_mpss to simplify code (Yijing Wang)
SR-IOV
- Enable upstream bridges even for VFs on virtual buses (Bjorn Helgaas)
- Use pci_is_root_bus() to avoid catching virtual buses (Wei Yang)
Virtualization
- Add x86 MSI masking ops (Konrad Rzeszutek Wilk)
Freescale i.MX6
- Support i.MX6 PCIe controller (Sean Cross)
- Increase link startup timeout (Marek Vasut)
- Probe PCIe in fs_initcall() (Marek Vasut)
- Fix imprecise abort handler (Tim Harvey)
- Remove redundant of_match_ptr (Sachin Kamat)
Renesas R-Car
- Support Gen2 internal PCIe controller (Valentine Barshak)
Samsung Exynos
- Add MSI support (Jingoo Han)
- Turn off power when link fails (Jingoo Han)
- Add Jingoo Han as maintainer (Jingoo Han)
- Add clk_disable_unprepare() on error path (Wei Yongjun)
- Remove redundant of_match_ptr (Sachin Kamat)
Synopsys DesignWare
- Add irq_create_mapping() (Pratyush Anand)
- Add header guards (Seungwon Jeon)
Miscellaneous
- Enable native PCIe services by default on non-ACPI (Andrew Murray)
- Cleanup _OSC usage and messages (Bjorn Helgaas)
- Remove pcibios_last_bus boot option on non-x86 (Bjorn Helgaas)
- Convert bus code to use bus_, drv_, and dev_groups (Greg Kroah-Hartman)
- Remove unused pci_mem_start (Myron Stowe)
- Make sysfs functions static (Sachin Kamat)
- Warn on invalid return from driver probe (Stephen M. Cameron)
- Remove Intel Haswell D3 delays (Todd E Brandt)
- Call pci_set_master() in core if driver doesn't do it (Yinghai Lu)
- Use pci_is_pcie() to simplify code (Yijing Wang)
- Use PCIe capability accessors to simplify code (Yijing Wang)
- Use cached pci_dev->pcie_cap to simplify code (Yijing Wang)
- Removed unused "is_pcie" from struct pci_dev (Yijing Wang)
- Simplify sysfs CPU affinity implementation (Yijing Wang)"
* tag 'pci-v3.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (79 commits)
PCI: Enable upstream bridges even for VFs on virtual buses
PCI: Add pci_upstream_bridge()
PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()
PCI: Warn on driver probe return value greater than zero
PCI: Drop warning about drivers that don't use pci_set_master()
PCI: Workaround missing pci_set_master in pci drivers
powerpc/pci: Use pci_is_pcie() to simplify code [fix]
PCI: Update pcie_ports 'auto' behavior for non-ACPI platforms
PCI: imx6: Probe the PCIe in fs_initcall()
PCI: Add R-Car Gen2 internal PCI support
PCI: imx6: Remove redundant of_match_ptr
PCI: Report pci_pme_active() kmalloc failure
mn10300/PCI: Remove useless pcibios_last_bus
frv/PCI: Remove pcibios_last_bus
PCI: imx6: Increase link startup timeout
PCI: exynos: Remove redundant of_match_ptr
PCI: imx6: Fix imprecise abort handler
PCI: Fail MSI/MSI-X initialization if device is not in PCI_D0
PCI: imx6: Remove redundant dev_err() in imx6_pcie_probe()
x86/PCI: Coalesce multiple overlapping host bridge windows
...
82 lines
2.7 KiB
Plaintext
82 lines
2.7 KiB
Plaintext
* Synopsys Designware PCIe interface
|
|
|
|
Required properties:
|
|
- compatible: should contain "snps,dw-pcie" to identify the
|
|
core, plus an identifier for the specific instance, such
|
|
as "samsung,exynos5440-pcie" or "fsl,imx6q-pcie".
|
|
- reg: base addresses and lengths of the pcie controller,
|
|
the phy controller, additional register for the phy controller.
|
|
- interrupts: interrupt values for level interrupt,
|
|
pulse interrupt, special interrupt.
|
|
- clocks: from common clock binding: handle to pci clock.
|
|
- clock-names: from common clock binding: should be "pcie" and "pcie_bus".
|
|
- #address-cells: set to <3>
|
|
- #size-cells: set to <2>
|
|
- device_type: set to "pci"
|
|
- ranges: ranges for the PCI memory and I/O regions
|
|
- #interrupt-cells: set to <1>
|
|
- interrupt-map-mask and interrupt-map: standard PCI properties
|
|
to define the mapping of the PCIe interface to interrupt
|
|
numbers.
|
|
- num-lanes: number of lanes to use
|
|
- reset-gpio: gpio pin number of power good signal
|
|
|
|
Optional properties for fsl,imx6q-pcie
|
|
- power-on-gpio: gpio pin number of power-enable signal
|
|
- wake-up-gpio: gpio pin number of incoming wakeup signal
|
|
- disable-gpio: gpio pin number of outgoing rfkill/endpoint disable signal
|
|
|
|
Example:
|
|
|
|
SoC specific DT Entry:
|
|
|
|
pcie@290000 {
|
|
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
|
|
reg = <0x290000 0x1000
|
|
0x270000 0x1000
|
|
0x271000 0x40>;
|
|
interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
|
|
clocks = <&clock 28>, <&clock 27>;
|
|
clock-names = "pcie", "pcie_bus";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
device_type = "pci";
|
|
ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */
|
|
0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
|
|
0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
|
|
#interrupt-cells = <1>;
|
|
interrupt-map-mask = <0 0 0 0>;
|
|
interrupt-map = <0x0 0 &gic 53>;
|
|
num-lanes = <4>;
|
|
};
|
|
|
|
pcie@2a0000 {
|
|
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
|
|
reg = <0x2a0000 0x1000
|
|
0x272000 0x1000
|
|
0x271040 0x40>;
|
|
interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
|
|
clocks = <&clock 29>, <&clock 27>;
|
|
clock-names = "pcie", "pcie_bus";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
device_type = "pci";
|
|
ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */
|
|
0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
|
|
0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
|
|
#interrupt-cells = <1>;
|
|
interrupt-map-mask = <0 0 0 0>;
|
|
interrupt-map = <0x0 0 &gic 56>;
|
|
num-lanes = <4>;
|
|
};
|
|
|
|
Board specific DT Entry:
|
|
|
|
pcie@290000 {
|
|
reset-gpio = <&pin_ctrl 5 0>;
|
|
};
|
|
|
|
pcie@2a0000 {
|
|
reset-gpio = <&pin_ctrl 22 0>;
|
|
};
|