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ac930bab1c
Currently intel_bw.c contains basically three completely independent parts: - SAGV/memory bandwidth handling - DBuf bandwidth handling - "Maximum pipe read bandwidth" calculation, which is some kind of internal per-pipe bandwidth limit. Carve out the DBuf bandwdith handling into a separate file since there is no actual dependency between it and the rest of intel_bw.c. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20251013201236.30084-2-ville.syrjala@linux.intel.com Reviewed-by: Mika Kahola <mika.kahola@intel.com>
38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2025 Intel Corporation
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*/
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#ifndef __INTEL_DBUF_BW_H__
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#define __INTEL_DBUF_BW_H__
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#include <drm/drm_atomic.h>
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struct intel_atomic_state;
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struct intel_dbuf_bw_state;
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struct intel_crtc;
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struct intel_display;
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struct intel_global_state;
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struct intel_dbuf_bw_state *
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to_intel_dbuf_bw_state(struct intel_global_state *obj_state);
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struct intel_dbuf_bw_state *
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intel_atomic_get_old_dbuf_bw_state(struct intel_atomic_state *state);
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struct intel_dbuf_bw_state *
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intel_atomic_get_new_dbuf_bw_state(struct intel_atomic_state *state);
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struct intel_dbuf_bw_state *
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intel_atomic_get_dbuf_bw_state(struct intel_atomic_state *state);
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int intel_dbuf_bw_init(struct intel_display *display);
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int intel_dbuf_bw_calc_min_cdclk(struct intel_atomic_state *state,
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bool *need_cdclk_calc);
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int intel_dbuf_bw_min_cdclk(struct intel_display *display,
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const struct intel_dbuf_bw_state *dbuf_bw_state);
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void intel_dbuf_bw_update_hw_state(struct intel_display *display);
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void intel_dbuf_bw_crtc_disable_noatomic(struct intel_crtc *crtc);
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#endif /* __INTEL_DBUF_BW_H__ */
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