mirror of
https://github.com/torvalds/linux.git
synced 2026-04-18 06:44:00 -04:00
Create initial schema for Nuvoton MA35 family Gigabit MAC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Joey Lu <a0987203069@gmail.com> Link: https://patch.msgid.link/20260323101756.81849-2-a0987203069@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
141 lines
3.3 KiB
YAML
141 lines
3.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/net/nuvoton,ma35d1-dwmac.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Nuvoton DWMAC glue layer controller
|
|
|
|
maintainers:
|
|
- Joey Lu <yclu4@nuvoton.com>
|
|
|
|
description:
|
|
Nuvoton 10/100/1000Mbps Gigabit Ethernet MAC Controller is based on
|
|
Synopsys DesignWare MAC (version 3.73a).
|
|
|
|
select:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- nuvoton,ma35d1-dwmac
|
|
required:
|
|
- compatible
|
|
|
|
allOf:
|
|
- $ref: snps,dwmac.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
items:
|
|
- const: nuvoton,ma35d1-dwmac
|
|
- const: snps,dwmac-3.70a
|
|
|
|
reg:
|
|
maxItems: 1
|
|
description:
|
|
Register range should be one of the GMAC interface.
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
items:
|
|
- description: MAC clock
|
|
- description: PTP clock
|
|
|
|
clock-names:
|
|
items:
|
|
- const: stmmaceth
|
|
- const: ptp_ref
|
|
|
|
nuvoton,sys:
|
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
|
items:
|
|
- items:
|
|
- description: phandle to access syscon registers.
|
|
- description: GMAC interface ID.
|
|
enum:
|
|
- 0
|
|
- 1
|
|
description:
|
|
A phandle to the syscon with one argument that configures system registers
|
|
for MA35D1's two GMACs. The argument specifies the GMAC interface ID.
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
reset-names:
|
|
items:
|
|
- const: stmmaceth
|
|
|
|
phy-mode:
|
|
enum:
|
|
- rmii
|
|
- rgmii
|
|
- rgmii-id
|
|
- rgmii-txid
|
|
- rgmii-rxid
|
|
|
|
tx-internal-delay-ps:
|
|
default: 0
|
|
minimum: 0
|
|
maximum: 2000
|
|
description:
|
|
RGMII TX path delay used only when PHY operates in RGMII mode with
|
|
internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
|
|
Allowed values are from 0 to 2000.
|
|
|
|
rx-internal-delay-ps:
|
|
default: 0
|
|
minimum: 0
|
|
maximum: 2000
|
|
description:
|
|
RGMII RX path delay used only when PHY operates in RGMII mode with
|
|
internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
|
|
Allowed values are from 0 to 2000.
|
|
|
|
required:
|
|
- clocks
|
|
- clock-names
|
|
- nuvoton,sys
|
|
- resets
|
|
- reset-names
|
|
- phy-mode
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
|
|
#include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
|
|
ethernet@40120000 {
|
|
compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a";
|
|
reg = <0x40120000 0x10000>;
|
|
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "macirq";
|
|
clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>;
|
|
clock-names = "stmmaceth", "ptp_ref";
|
|
|
|
nuvoton,sys = <&sys 0>;
|
|
resets = <&sys MA35D1_RESET_GMAC0>;
|
|
reset-names = "stmmaceth";
|
|
snps,multicast-filter-bins = <0>;
|
|
snps,perfect-filter-entries = <8>;
|
|
rx-fifo-depth = <4096>;
|
|
tx-fifo-depth = <2048>;
|
|
|
|
phy-mode = "rgmii-id";
|
|
phy-handle = <ð_phy0>;
|
|
mdio {
|
|
compatible = "snps,dwmac-mdio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
eth_phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
};
|
|
};
|