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linux/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
Marc Kleine-Budde 14e1e9338c dt-bindings: can: ctucanfd: include common CAN controller bindings
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| 1f9234401c ("dt-bindings: can: add can-controller.yaml")

there is a common CAN controller binding. Add this to the ctucanfd
binding.

Cc: Ondrej Ille <ondrej.ille@gmail.com>
Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-05-16 22:11:04 +02:00

67 lines
1.7 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/ctu,ctucanfd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: CTU CAN FD Open-source IP Core Device Tree Bindings
description: |
Open-source CAN FD IP core developed at the Czech Technical University in Prague
The core sources and documentation on project page
[1] sources : https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core
[2] datasheet : https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf
Integration in Xilinx Zynq SoC based system together with
OpenCores SJA1000 compatible controllers
[3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top
Martin Jerabek dimploma thesis with integration and testing
framework description
[4] PDF : https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf
maintainers:
- Pavel Pisa <pisa@cmp.felk.cvut.cz>
- Ondrej Ille <ondrej.ille@gmail.com>
- Martin Jerabek <martin.jerabek01@gmail.com>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- items:
- const: ctu,ctucanfd-2
- const: ctu,ctucanfd
- const: ctu,ctucanfd
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
description: |
phandle of reference clock (100 MHz is appropriate
for FPGA implementation on Zynq-7000 system).
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
additionalProperties: false
examples:
- |
ctu_can_fd_0: can@43c30000 {
compatible = "ctu,ctucanfd";
interrupts = <0 30 4>;
clocks = <&clkc 15>;
reg = <0x43c30000 0x10000>;
};