Aurabindo Pillai c7b4ecc1fa drm/amd/display: Add a missing DCN401 reg definition ...

Add a mising reg field to the autogenerated header for future use

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2024-11-04 11:40:21 -05:00

..

dcn_1_0_offset.h

drm/amd/include: Add HUBPREQ_DEBUG register offsets

2019-04-23 17:27:08 -05:00

dcn_1_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dcn_2_0_0_offset.h

drm/amd/include: Add OCSC registers

2020-01-16 13:41:06 -05:00

dcn_2_0_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dcn_2_0_3_offset.h

drm/amdgpu: fix file permissions on some files

2022-07-13 11:25:18 -04:00

dcn_2_0_3_sh_mask.h

drm/amdgpu: fix file permissions on some files

2022-07-13 11:25:18 -04:00

dcn_2_1_0_offset.h

drm/amd/include: Add OCSC registers

2020-01-16 13:41:06 -05:00

dcn_2_1_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dcn_3_0_0_offset.h

drm/amd: Add DCN401 related register definitions

2024-04-26 17:23:08 -04:00

dcn_3_0_0_sh_mask.h

drm/amd: Add DCN401 related register definitions

2024-04-26 17:23:08 -04:00

dcn_3_0_1_offset.h

drm/amdgpu: add vangogh asic header files (v2)

2020-10-05 15:14:02 -04:00

dcn_3_0_1_sh_mask.h

drm/amd/display: Add missing registers for ACP

2022-07-05 16:10:28 -04:00

dcn_3_0_2_offset.h

drm/amd: Add DCN401 related register definitions

2024-04-26 17:23:08 -04:00

dcn_3_0_2_sh_mask.h

drm/amd: Add DCN401 related register definitions

2024-04-26 17:23:08 -04:00

dcn_3_0_3_offset.h

drm/amd: Add DCN401 related register definitions

2024-04-26 17:23:08 -04:00

dcn_3_0_3_sh_mask.h

drm/amd: Add DCN401 related register definitions

2024-04-26 17:23:08 -04:00

dcn_3_1_2_offset.h

drm/amd/display: Add missing registers

2024-04-09 22:06:16 -04:00

dcn_3_1_2_sh_mask.h

drm/amd/display: Add missing registers

2024-04-09 22:06:16 -04:00

dcn_3_1_4_offset.h

drm/amdgpu: Add reg headers for DCN314

2022-07-13 20:57:04 -04:00

dcn_3_1_4_sh_mask.h

drm/amdgpu: Add reg headers for DCN314

2022-07-13 20:57:04 -04:00

dcn_3_1_5_offset.h

drm/amd/display: Add some missing HDMI registers for DCN3x

2024-04-26 17:22:42 -04:00

dcn_3_1_5_sh_mask.h

drm/amd/display: Add some missing HDMI registers for DCN3x

2024-04-26 17:22:42 -04:00

dcn_3_1_6_offset.h

drm/amd/include: Add missing registers/mask for DCN316 and 350

2024-01-29 15:34:33 -05:00

dcn_3_1_6_sh_mask.h

drm/amd/include: Add missing registers/mask for DCN316 and 350

2024-01-29 15:34:33 -05:00

dcn_3_2_0_offset.h

drm/amd/display: Add missing registers

2024-04-09 22:06:16 -04:00

dcn_3_2_0_sh_mask.h

drm/amd: Add DCN401 related register definitions

2024-04-26 17:23:08 -04:00

dcn_3_2_1_offset.h

drm/amd/display: Add missing registers and offset

2024-03-20 13:38:13 -04:00

dcn_3_2_1_sh_mask.h

drm/amd/display: Add missing registers and offset

2024-03-20 13:38:13 -04:00

dcn_3_5_0_offset.h

drm/amd/include: Add missing registers/mask for DCN316 and 350

2024-01-29 15:34:33 -05:00

dcn_3_5_0_sh_mask.h

drm/amd/include: Add missing registers/mask for DCN316 and 350

2024-01-29 15:34:33 -05:00

dcn_3_5_1_offset.h

drm/amd: add register headers for DCN351

2024-03-04 15:59:07 -05:00

dcn_3_5_1_sh_mask.h

drm/amd: add register headers for DCN351

2024-03-04 15:59:07 -05:00

dcn_4_1_0_offset.h

drm/amd: Add some missing register definitions

2024-06-27 17:32:17 -04:00

dcn_4_1_0_sh_mask.h

drm/amd/display: Add a missing DCN401 reg definition

2024-11-04 11:40:21 -05:00