mirror of
https://github.com/torvalds/linux.git
synced 2026-04-27 11:02:31 -04:00
44c916d58b
Pull ARM SoC cleanups from Olof Johansson:
"This merge window brings a good size of cleanups on various platforms.
Among the bigger ones:
- Removal of Samsung s5pc100 and s5p64xx platforms. Both of these
have lacked active support for quite a while, and after asking
around nobody showed interest in keeping them around. If needed,
they could be resurrected in the future but it's more likely that
we would prefer reintroduction of them as DT and
multiplatform-enabled platforms instead.
- OMAP4 controller code register define diet. They defined a lot of
registers that were never actually used, etc.
- Move of some of the Tegra platform code (PMC, APBIO, fuse,
powergate) to drivers/soc so it can be shared with 64-bit code.
This also converts them over to traditional driver models where
possible.
- Removal of legacy gpio-samsung driver, since the last users have
been removed (moved to pinctrl)
Plus a bunch of smaller changes for various platforms that sort of
dissapear in the diffstat for the above. clps711x cleanups, shmobile
header file refactoring/moves for multiplatform friendliness, some
misc cleanups, etc"
* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
drivers: CCI: Correct use of ! and &
video: clcd-versatile: Depend on ARM
video: fix up versatile CLCD helper move
MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
MAINTAINERS: Remove Kirkwood
ARM: tegra: Convert PMC to a driver
soc/tegra: fuse: Set up in early initcall
ARM: tegra: Always lock the CPU reset vector
ARM: tegra: Setup CPU hotplug in a pure initcall
soc/tegra: Implement runtime check for Tegra SoCs
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
ARM: tegra: move fuse exports to soc/tegra/fuse.h
ARM: tegra: export apb dma readl/writel
ARM: tegra: Use a function to get the chip ID
ARM: tegra: Sort includes alphabetically
ARM: tegra: Move includes to include/soc/tegra
...
110 lines
3.0 KiB
Plaintext
110 lines
3.0 KiB
Plaintext
* Samsung SPI Controller
|
|
|
|
The Samsung SPI controller is used to interface with various devices such as flash
|
|
and display controllers using the SPI communication interface.
|
|
|
|
Required SoC Specific Properties:
|
|
|
|
- compatible: should be one of the following.
|
|
- samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
|
|
- samsung,s3c6410-spi: for s3c6410 platforms
|
|
- samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
|
|
- samsung,exynos4210-spi: for exynos4 and exynos5 platforms
|
|
|
|
- reg: physical base address of the controller and length of memory mapped
|
|
region.
|
|
|
|
- interrupts: The interrupt number to the cpu. The interrupt specifier format
|
|
depends on the interrupt controller.
|
|
|
|
- dmas : Two or more DMA channel specifiers following the convention outlined
|
|
in bindings/dma/dma.txt
|
|
|
|
- dma-names: Names for the dma channels. There must be at least one channel
|
|
named "tx" for transmit and named "rx" for receive.
|
|
|
|
Required Board Specific Properties:
|
|
|
|
- #address-cells: should be 1.
|
|
- #size-cells: should be 0.
|
|
|
|
Optional Board Specific Properties:
|
|
|
|
- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
|
|
select the clock source for the spi bus clock, this property can be used to
|
|
indicate the clock to be used for driving the spi bus clock. If not specified,
|
|
the clock number 0 is used as default.
|
|
|
|
- num-cs: Specifies the number of chip select lines supported. If
|
|
not specified, the default number of chip select lines is set to 1.
|
|
|
|
- cs-gpios: should specify GPIOs used for chipselects (see spi-bus.txt)
|
|
|
|
SPI Controller specific data in SPI slave nodes:
|
|
|
|
- The spi slave nodes should provide the following information which is required
|
|
by the spi controller.
|
|
|
|
- samsung,spi-feedback-delay: The sampling phase shift to be applied on the
|
|
miso line (to account for any lag in the miso line). The following are the
|
|
valid values.
|
|
|
|
- 0: No phase shift.
|
|
- 1: 90 degree phase shift sampling.
|
|
- 2: 180 degree phase shift sampling.
|
|
- 3: 270 degree phase shift sampling.
|
|
|
|
Aliases:
|
|
|
|
- All the SPI controller nodes should be represented in the aliases node using
|
|
the following format 'spi{n}' where n is a unique number for the alias.
|
|
|
|
|
|
Example:
|
|
|
|
- SoC Specific Portion:
|
|
|
|
spi_0: spi@12d20000 {
|
|
compatible = "samsung,exynos4210-spi";
|
|
reg = <0x12d20000 0x100>;
|
|
interrupts = <0 66 0>;
|
|
dmas = <&pdma0 5
|
|
&pdma0 4>;
|
|
dma-names = "tx", "rx";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
- Board Specific Portion:
|
|
|
|
spi_0: spi@12d20000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi0_bus>;
|
|
cs-gpios = <&gpa2 5 0>;
|
|
|
|
w25q80bw@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "w25x80";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000>;
|
|
|
|
controller-data {
|
|
samsung,spi-feedback-delay = <0>;
|
|
};
|
|
|
|
partition@0 {
|
|
label = "U-Boot";
|
|
reg = <0x0 0x40000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "Kernel";
|
|
reg = <0x40000 0xc0000>;
|
|
};
|
|
};
|
|
};
|